ATA5428-PLSW datasheet(20/100 Pages) ATMEL

20 / 100 page

4841D–WIRE–10/07

ATA5423/ATA5425/ATA5428/ATA5429

Figure 3-9.

FSK-modulated TX Spectrum (433.92 MHz/20 Kbit/s/±16.17 kHz/Manchester Code)

3.12

Output Power Setting and PA Matching at RF_OUT

The Power Amplifier (PA) is a single-ended open collector stage which delivers a current pulse

which is nearly independent of supply voltage, temperature and tolerances due to band gap sta-

bilization. Resistor R

1, see Figure 3-10 on page 21, sets a reference current which controls the

current in the PA. A higher resistor value results in a lower reference current, a lower output

power and a lower current consumption of the PA. The usable range of R

1 is 15 kΩ to 56 kΩ. Pin

PWR_H switches the output power range between about 0 dBm to 5 dBm (PWR_H = GND) and

5 dBm to 10 dBm (PWR_H = AVCC) by multiplying this reference current by a factor 1

(PWR_H = GND) and 2.5 (PWR_H = AVCC), which corresponds to about 5 dB more output

power.

If the PA is switched off in TX mode, the current consumption without output stage with

VS1 = VS2 = 3 V, T

amb = 25°C is typically 6.5 mA for 868.3 MHz and 6.95 mA for 315 MHz and

433.92 MHz.

The maximum output power is achieved with optimum load resistances R

Lopt according to Table

3-7 on page 22 with compensation of the 1.0 pF output capacitance of the RF_OUT pin by

absorbing it into the matching network consisting of L

1, C1, C3 as shown in Figure 3-10 on page

21. There must also be a low resistive DC path to AVCC to deliver the DC current of the power

amplifier's last stage. The matching of the PA output was done with the circuit shown in Figure

3-10 on page 21 with the values in Table 3-7 on page 22. Note that value changes of these ele-

ments may be necessary to compensate for individual board layouts.

Span 1 MHz

Sweep 27.5 ms (401 pts)

Center 433.92 MHz

VBW 10 kHz

Res BW 10 kHz

Atten 20 dB

VAvg

S3 FC

W1 S2

Ref 10 dB

Samp

Log

dB/

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