MMA8450QT datasheet(22/57 Pages) FREESCALE

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Sensors

Freescale Semiconductor

MMA8450Q

YDR is set whenever a new acceleration sample related to the Y-axis is available. YDR is cleared anytime OUTY_MSB register

is read. In order to enable the monitoring and assertion of this bit, the YDR bit requires the Y-axis event detection flag to be

enabled (bit YDEFE = 1 inside XYZ_DATA_CFG register).

XDR is set to 1 whenever a new acceleration sample related to the X-axis is available. XDR is cleared anytime OUTX_MSB

register is read. In order to enable the monitoring and assertion of this bit, the XDR bit requires the X-axis to event detection flag

to be enabled (bit XDEFE = 1 inside XYZ_DATA_CFG register).

The ZDR and ZOW flag generation requires the Z-axis event flag generator to be enabled (ZDEFE = 1) in the XYZ_DATA_CFG

The YDR and YOW flag generation requires the Y-axis event flag generator to be enabled (YDEFE = 1) in the XYZ_DATA_CFG

The XDR and XOW flag generation requires the X-axis event flag generator to be enabled (XDEFE = 1) in the XYZ_DATA_CFG

The ZYXDR and ZYXOW flag generation is requires the Z-axis, Y-axis, X-axis event flag generator to be enabled (ZDEFE = 1,

YDEFE = 1, XDEFE = 1) in the XYZ_DATA_CFG register.

0x01, 0x02, 0x03: OUT_MSB 8-Bit XYZ Data Registers

X, Y and Z-axis data is expressed as 2’s complement numbers. The most significant 8-bits are stored together in

OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB so applications needing only 8-bit results can use these registers and can ignore the

OUT_X_LSB, OUT_Y_LSB, OUT_Z_LSB. The status Register 0x00, OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB are duplicated

in the auto-incrementing address range of 0x00 to 0x03 to reduce reading the status followed by 8-bit axis data to a 4 byte

sequence.

0x05 - 0x0A: OUT_MSB and OUT_LSB 12-Bit XYZ Data Registers

X, Y and Z-axis data is expressed as 2’s complement numbers. The STATUS (0x04), OUT_X_LSB (0x05), OUT_X_MSB

(0x06), OUT_Y_LSB (0x07), OUT_Y_MSB (0x08), OUT_Z_LSB(0x09), OUT_Z_MSB (0x0A) are stored in auto-incrementing

address range of 0x04 to 0x0A to reduce reading the status followed by 12-bit axis data to 7 bytes.

0x01 OUT_X_MSB: X_MSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

XD11

XD10

XD9

XD8

XD7

XD6

XD5

XD4

0x02 OUT_Y_MSB: Y_MSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

YD11

YD10

YD9

YD8

YD7

YD6

YD5

YD4

0x03 OUT_Z_MSB: Z_MSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ZD11

ZD10

ZD9

ZD8

ZD7

ZD6

ZD5

ZD4

0x05 OUT_X_LSB: X_LSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

XD3

XD2

XD1

XD0

0x06 OUT_X_MSB: X_MSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

XD11

XD10

XD9

XD8

XD7

XD6

XD5

XD4

0x07 OUT_Y_LSB: Y_LSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

YD3

YD2

YD1

YD0

0x08 OUT_Y_MSB: Y_MSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

YD11

YD10

YD9

YD8

YD7

YD6

YD5

YD4

0x09 OUT_Z_LSB: Z_LSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0000

ZD3

ZD2

ZD1

ZD0

0x0A OUT_Z_MSB: Z_MSB Register (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ZD11

ZD10

ZD9

ZD8

ZD7

ZD6

ZD5

ZD4

MMA8450QT Datasheet(PDF) 22 Page - Freescale Semiconductor, Inc

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