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MMA8450QT Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc |
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MMA8450QT Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc |
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19 / 57 page ![]() Sensors 19 Freescale Semiconductor MMA8450Q 6 Register Descriptions Table 11 is the memory map of the MMA8450Q.The user has access to all addresses from 0x00 to 0x3F. Table 11. Register Address Map Name Type Register Address Auto-Increment Address Default Comment STATUS(1)(2) R 0x00 0x01 00000000 Addresses 0x00, 0x04, 0x0B are aliases to the same register. Data Ready status information or FIFO status information. OUT_X_MSB(1)(2) R 0x01 0x02 0x01 output [7:0] are 8 MSBs of 12-bit real-time sample. Root pointer to XYZ FIFO 8-bit data. OUT_Y_MSB(1)(2) R 0x02 0x03 output [7:0] are 8 MSBs of 12-bit real-time sample OUT_Z_MSB(1)(2) R0x03 0x00 output [7:0] are 8 MSBs of 12-bit real-time sample STATUS(1)(2) R 0x04 0x05 00000000 Addresses 0x00, 0x04, 0x0B are aliases to the same register. Data Ready status information or FIFO status information. OUT_X_LSB(1)(2) R 0x05 0x06 0x05 output [3:0] are 4 LSBs of 12-bit sample. Root pointer to XYZ FIFO 12-bit data. OUT_X_MSB(1)(2) R 0x06 0x07 output [7:0] are 8 MSBs of 12-bit real-time sample OUT_Y_LSB(1)(2) R 0x07 0x08 output [3:0] are 4 LSBs of 12-bit real-time sample OUT_Y_MSB(1)(2) R 0x08 0x09 output [7:0] are 8 MSBs of 12-bit real-time sample OUT_Z_LSB(1)(2) R 0x09 0x0A output [3:0] are 4 LSBs of 12-bit real-time sample OUT_Z_MSB(1)(2) R0x0A 0x04 output [7:0] are 8 MSBs of 12-bit real-time sample STATUS(1)(2) R 0x0B 0x0C 00000000 Addresses 0x00, 0x04, 0x0B are aliases to the same register. Data Ready status information or FIFO status information. OUT_X_DELTA(1)(2) R 0x0C 0x0D output 8-bit AC X-axis data OUT_Y_DELTA(1)(2) R 0x0D 0x0E output 8-bit AC Y-axis data OUT_Z_DELTA(1)(2) R0x0E 0x0B output 8-bit AC Z-axis data WHO_AM_I(1) R 0x0F 0xC6 11000110 NWM Programmable Fixed Device ID No. F_STATUS(1)(2) R 0x10 0x11 00000000 FIFO Status: No FIFO event Detected F_8DATA(1)(2) R0x11 0x11 Output FIFO status and 8-bit samples F_12DATA(1)(2) R0x12 0x12 Output FIFO status and 12-bit samples F_SETUP(1)(3) R/W 0x13 0x14 00000000 FIFO setup SYSMOD(1)(2) R 0x14 0x15 Output Current System Mode INT_SOURCE(1)(2) R 0x15 0x16 Output Interrupt status XYZ_DATA_CFG(1)(4) R/W 0x16 0x17 00000000 Acceleration data event flag configuration HP_FILTER_CUTOFF 1,3 R/W 0x17 0x18 00000000 Cutoff frequency is set to 4Hz @ 400Hz PL_STATUS(1)(2) R 0x18 0x19 00000000 Landscape/Portrait orientation status PL_PRE_STATUS(1)(2) R 0x19 0x1A 00000000 Landscape/Portrait previous orientation PL_CFG(1)(4) R/W 0x1A 0x1B 10000011 Landscape/Portrait configuration. 1g Lockout offset is set to default value of 1.15g. Debounce counters are clear during invalid sequence condition. PL_COUNT(1)(3) R/W 0x1B 0x1C 00000000 Landscape/Portrait debounce counter PL_BF_ZCOMP(1)(4) R/W 0x1C 0x1D 00000010 Back-Front Trip threshold is ±75°. Z-Lockout angle is 32.14° PL_P_L_THS_REG1(1)(4) R/W 0x1D 0x1E 00011010 Portrait-to-Landscape Trip Angle is 30° |
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