SPMCK16Z4MPV16 datasheet(218/500 Pages) FREESCALE

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QUEUED SERIAL MODULE

M68HC16 Z SERIES

9-8

USER’S MANUAL

9.3.2.3 Command RAM

Command RAM is used by the QSPI in master mode. The CPU16 writes one byte of

control information to this segment for each QSPI command to be executed. The QSPI

cannot modify information in command RAM.

Command RAM consists of 16 bytes. Each byte is divided into two fields. The periph-

eral chip-select field enables peripherals for transfer. The command control field pro-

vides transfer options.

A maximum of 16 commands can be in the queue. Queue execution by the QSPI pro-

ceeds from the address in NEWQP through the address in ENDQP (both of these

fields are in SPCR2).

9.3.3 QSPI Pins

The QSPI uses seven pins. These pins can be configured for general-purpose I/O

when not needed for QSPI application.

Table 9-2 shows QSPI input and output pins and their functions.

9.3.4 QSPI Operation

The QSPI uses a dedicated 80-byte block of static RAM accessible by both the QSPI

and the CPU16 to perform queued operations. The RAM is divided into three seg-

ments. There are 16 command bytes, 16 transmit data words, and 16 receive data

words. QSPI RAM is organized so that one byte of command data, one word of trans-

mit data, and one word of receive data correspond to one queue entry, $0–$F.

The CPU16 initiates QSPI operation by setting up a queue of QSPI commands in com-

mand RAM, writing transmit data into transmit RAM, then enabling the QSPI. The

QSPI executes the queued commands, sets a completion flag (SPIF), and then either

interrupts the CPU16 or waits for intervention.

There are four queue pointers. The CPU16 can access three of them through fields in

QSPI registers. The new queue pointer (NEWQP), contained in SPCR2, points to the

first command in the queue. An internal queue pointer points to the command currently

being executed. The completed queue pointer (CPTQP), contained in SPSR, points to

the last command executed. The end queue pointer (ENDQP), contained in SPCR2,

points to the final command in the queue.

Table 9-2 QSPI Pins

Pin Names

Mnemonics

Mode

Function

Master In Slave Out

MISO

Master

Slave

Serial data input to QSPI

Serial data output from QSPI

Master Out Slave In

MOSI

Master

Slave

Serial data output from QSPI

Serial data input to QSPI

Serial Clock

SCK

Master

Slave

Clock output from QSPI

Clock input to QSPI

Peripheral Chip Selects

PCS[3:1]

Master

Select peripherals

Slave Select

PCS0/SS

Master

Slave

Selects peripherals

Causes mode fault

Initiates serial transfer

Freescale Semiconductor, Inc.

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SPMCK16Z4MPV16 Datasheet(PDF) 218 Page - Freescale Semiconductor, Inc

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