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SPMCK16Z4MPV16 Datasheet(PDF) 84 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV16 Datasheet(HTML) 84 Page - Freescale Semiconductor, Inc |
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84 / 500 page  CENTRAL PROCESSING UNIT M68HC16 Z SERIES 4-24 USER’S MANUAL PULM1 Pull Multiple Registers Mask bits: 0 = CCR[15:4] 1 = K 2 = IZ 3 = IY 4 = IX 5 = E 6 = D 7 = (Reserved) For mask bits 0 to 7: If mask bit set (SK : SP) + 2 ⇒ SK : SP Pull register IMM8 35 ii 4+2(N+1) N = number of registers pulled ∆ ∆ ∆ ∆ ∆∆∆∆ PULMAC Pull MAC State Stack ⇒ MAC Registers INH 27B9 — 16 — — — — ———— RMAC Repeating Multiply and Accumulate Signed 16-Bit Fractions Repeat until (E) < 0 (AM) + (H) ∗ (I) ⇒ AM Qualified (IX) ⇒ IX; Qualified (IY) ⇒ IY; (M : M + 1)X ⇒ H; (M : M + 1) Y ⇒ I (E) − 1 ⇒ E Until (E) < $0000 IMM8 FB xoyo 6 + 12 per iteration — ∆ — ∆ ———— ROL Rotate Left IND8, X IND8, Y IND8, Z IND16, X IND16, Y IND16, Z EXT 0C 1C 2C 170C 171C 172C 173C ff ff ff gggg gggg gggg hh ll 8 8 8 8 8 8 8 —— — — ∆∆∆∆ ROLA Rotate Left A INH 370C — 2 — — — — ∆∆∆∆ ROLB Rotate Left B INH 371C — 2 — — — — ∆∆∆∆ ROLD Rotate Left D INH 27FC — 2 — — — — ∆∆∆∆ ROLE Rotate Left E INH 277C — 2 — — — — ∆∆∆∆ ROLW Rotate Left Word IND16, X IND16, Y IND16, Z EXT 270C 271C 272C 273C gggg gggg gggg hh ll 8 8 8 8 —— — — ∆∆∆∆ ROR Rotate Right Byte IND8, X IND8, Y IND8, Z IND16, X IND16, Y IND16, Z EXT 0E 1E 2E 170E 171E 172E 173E ff ff ff gggg gggg gggg hh ll 8 8 8 8 8 8 8 —— — — ∆∆∆∆ RORA Rotate Right A INH 370E — 2 — — — — ∆∆∆∆ RORB Rotate Right B INH 371E — 2 — — — — ∆∆∆∆ RORD Rotate Right D INH 27FE — 2 — — — — ∆∆∆∆ RORE Rotate Right E INH 277E — 2 — — — — ∆∆∆∆ Table 4-2 Instruction Set Summary (Continued) Mnemonic Operation Description Address Instruction Condition Codes Mode Opcode Operand Cycles S MV H EV N Z V C Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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