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SPMCK16Z4MPV16 Datasheet(PDF) 24 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV16 Datasheet(HTML) 24 Page - Freescale Semiconductor, Inc |
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24 / 500 page ![]() M68HC16 Z SERIES USER’S MANUAL (Continued) Table Title Page LIST OF TABLES D-3 Show Cycle Enable Bits ..................................................................................D-6 D-4 Port E Pin Assignments.................................................................................D-10 D-5 Port F Pin Assignments .................................................................................D-11 D-6 Software Watchdog Divide Ratio...................................................................D-12 D-7 Bus Monitor Time-Out Period ........................................................................D-13 D-8 Pin Assignment Field Encoding.....................................................................D-16 D-9 CSPAR0 Pin Assignments ............................................................................D-16 D-10 CSPAR1 Pin Assignments ............................................................................D-17 D-11 Reset Pin Function of CS[10:6] .....................................................................D-17 D-12 Block Size Field Bit Encoding........................................................................D-18 D-13 BYTE Field Bit Encoding ...............................................................................D-19 D-14 Read/Write Field Bit Encoding ......................................................................D-19 D-15 DSACK Field Encoding .................................................................................D-20 D-16 Memory Access Times at 16.78, 20.97, and 25.17 MHz...............................D-20 D-17 Address Space Bit Encodings .......................................................................D-21 D-18 Interrupt Priority Level Field Encoding ..........................................................D-21 D-19 SRAM Address Map ......................................................................................D-23 D-20 SRAM Array Address Space Type ................................................................D-23 D-21 MRM Address Map........................................................................................D-25 D-22 ROM Array Space Field ................................................................................D-26 D-23 Wait States Field ...........................................................................................D-26 D-24 ADC Module Address Map ............................................................................D-29 D-25 Freeze Encoding ...........................................................................................D-30 D-26 Sample Time Selection .................................................................................D-31 D-27 Prescaler Output ...........................................................................................D-32 D-28 ADC Conversion Mode..................................................................................D-33 D-29 Single-Channel Conversions (MULT = 0)......................................................D-34 D-30 Multiple-Channel Conversions (MULT = 1) ...................................................D-35 D-31 QSM Address Map ........................................................................................D-38 D-32 Examples of SCI Baud Rates ........................................................................D-41 D-33 PQSPAR Pin Assignments............................................................................D-45 D-34 Effect of DDRQS on QSM Pin Function ........................................................D-46 D-35 Bits Per Transfer ...........................................................................................D-47 D-36 Examples of SCK Frequencies .....................................................................D-48 D-37 MCCI Address Map .......................................................................................D-54 D-38 Interrupt Vector Sources ...............................................................................D-56 D-39 MPAR Pin Assignments ................................................................................D-57 D-40 Effect of MDDR on MCCI Pin Function .........................................................D-58 D-41 Examples of SCI Baud Rates ........................................................................D-60 D-42 GPT Address Map .........................................................................................D-67 D-43 GPT Interrupt Sources ..................................................................................D-69 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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