SPMCK16Z4MPV16 datasheet(63/500 Pages) FREESCALE

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M68HC16 Z SERIES

CENTRAL PROCESSOR UNIT

USER’S MANUAL

4-3

4.2.1 Accumulators

The CPU16 has two 8-bit accumulators (A and B) and one 16-bit accumulator (E). In

addition, accumulators A and B can be concatenated into a second 16-bit double ac-

cumulator (D).

Accumulators A, B, and D are general-purpose registers that hold operands and re-

sults during mathematical and data manipulation operations.

Accumulator E, which can be used in the same way as accumulator D, also extends

CPU16 capabilities. It allows more data to be held within the CPU16 during operations,

simplifies 32-bit arithmetic and digital signal processing, and provides a practical 16-

bit accumulator offset indexed addressing mode.

4.2.2 Index Registers

The CPU16 has three 16-bit index registers (IX, IY, and IZ). Each index register has

an associated 4-bit extension field (XK, YK, and ZK).

Concatenated registers and extension fields provide 20-bit indexed addressing and

support data structure functions anywhere in the CPU16 address space.

IX and IY can perform the same operations as M68HC11 registers of the same names,

but the CPU16 instruction set provides additional indexed operations.

IZ can perform the same operations as IX and IY. IZ also provides an additional in-

dexed addressing capability that replaces M68HC11 direct addressing mode. Initial IZ

and ZK extension field values are included in the RESET exception vector, so that

ZK:IZ can be used as a direct page pointer out of reset.

4.2.3 Stack Pointer

The CPU16 stack pointer (SP) is 16 bits wide. An associated 4-bit extension field (SK)

provides 20-bit stack addressing.

Stack implementation in the CPU16 is from high to low memory. The stack grows

downward as it is filled. SK:SP are decremented each time data is pushed on the

stack, and incremented each time data is pulled from the stack.

SK:SP point to the next available stack address rather than to the address of the latest

stack entry. Although the stack pointer is normally incremented or decremented by

word address, it is possible to push and pull byte-sized data. Setting the stack pointer

to an odd value causes data misalignment, which reduces performance.

4.2.4 Program Counter

The CPU16 program counter (PC) is 16 bits wide. An associated 4-bit extension field

(PK) provides 20-bit program addressing.

CPU16 instructions are fetched from even word boundaries. Address line 0 always

has a value of zero during instruction fetches to ensure that instructions are fetched

from word-aligned addresses.

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