SPMCK16Z4MPV16 datasheet(134/500 Pages) FREESCALE

134 / 500 page

SYSTEM INTEGRATION MODULE

M68HC16 Z SERIES

5-28

USER’S MANUAL

The periodic interrupt timer modulus counter is clocked by one of two signals. When

the PLL is enabled (MODCLK = 1 during reset), fref is used with a slow reference os-

cillator; fref 128 is used with fast reference oscillator. When the PLL is disabled (MOD-

CLK = 0 during reset), fref is used. The value of the periodic timer prescaler (PTP) bit

in the periodic interrupt timer register (PITR) determines system clock prescaling for

the periodic interrupt timer. One of two options, either no prescaling, or prescaling by

a factor of 512, can be selected. The value of PTP is affected by the state of the MOD-

CLK pin during reset, as shown in Table 5-11. System software can change PTP val-

ue.

Either clock signal selected by the PTP is divided by four before driving the modulus

counter. The modulus counter is initialized by writing a value to the periodic interrupt

timer modulus (PITM[7:0]) field in PITR. A zero value turns off the periodic timer. When

the modulus counter value reaches zero, an interrupt is generated. The modulus

counter is then reloaded with the value in PITM[7:0] and counting repeats. If a new val-

ue is written to PITR, it is loaded into the modulus counter when the current count is

completed.

The following equation calculates the PIT period when a slow reference frequency is

used:

The following equation calculates the PIT period when a fast reference frequency is

used:

The following equation calculates the PIT period for an externally input clock frequen-

cy on both slow and fast reference frequency devices.

5.4.7 Interrupt Priority and Vectoring

Interrupt priority and vectoring are determined by the values of the periodic interrupt

request level (PIRQL[2:0]) and periodic interrupt vector (PIV) fields in the periodic in-

terrupt control register (PICR).

Table 5-11 MODCLK Pin and PTP Bit at Reset

MODCLK

PTP

0 (External Clock)

1 (

÷ 512)

1 (Internal Clock)

0 (

÷ 1)

PIT Period

PITM[7:0]

() 1 if PTP = 0, 512 if PTP = 1

() 4

()

ref

---------------------------------------------------------------------------------------------------------------------

PIT Period

128

() PITM[7:0]

() 1 if PTP = 0, 512 if PTP = 1

() 4

()

ref

------------------------------------------------------------------------------------------------------------------------------------

PIT Period

PITM[7:0]

() 1 if PTP = 0, 512 if PTP = 1

() 4

()

sys

---------------------------------------------------------------------------------------------------------------------

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

SPMCK16Z4MPV16 Datasheet(PDF) 134 Page - Freescale Semiconductor, Inc

SPMCK16Z4MPV16 Datasheet(HTML) 134 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL