 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SPMCK16Z4MPV20 Datasheet(PDF) 306 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
SPMCK16Z4MPV20 Datasheet(HTML) 306 Page - Freescale Semiconductor, Inc |
|
|
306 / 500 page  ELECTRICAL CHARACTERISTICS M68HC16 Z SERIES A-22 USER’S MANUAL 30 CLKOUT Low to Data In Invalid (Fast Cycle Hold)7 tCLDI 15 — ns 30A CLKOUT Low to Data In High Impedance7 tCLDH —90 ns 31 DSACK[1:0] Asserted to Data In Valid9 tDADI —50 ns 33 Clock Low to BG Asserted/Negated tCLBAN —29 ns 35 BR Asserted to BG Asserted10 tBRAGA 1— tcyc 37 BGACK Asserted to BG Negated tGAGN 12 tcyc 39 BG Width Negated tGH 2— tcyc 39A BG Width Asserted tGA 1— tcyc 46 R/W Width Asserted (Write or Read) tRWA 150 — ns 46A R/W Width Asserted (Fast Write or Read Cycle) tRWAS 90 — ns 47A Asynchronous Input Setup Time BR, BGACK, DSACK[1:0], BERR, AVEC, HALT tAIST 5— ns 47B Asynchronous Input Hold Time tAIHT 15 — ns 48 DSACK[1:0] Asserted to BERR, HALT Asserted11 tDABA —30 ns 53 Data Out Hold from Clock High tDOCH 0— ns 54 Clock High to Data Out High Impedance tCHDH —28 ns 55 R/W Asserted to Data Bus Impedance Change tRADC 40 — ns 70 Clock Low to Data Bus Driven (Show Cycle) tSCLDD 029 ns 71 Data Setup Time to Clock Low (Show Cycle) tSCLDS 15 — ns 72 Data Hold from Clock Low (Show Cycle) tSCLDH 10 — ns 73 BKPT Input Setup Time tBKST 15 — ns 74 BKPT Input Hold Time tBKHT 10 — ns 75 Mode Select Setup Time, DATA[15:0], MODCLK, BKPT pins tMSS 20 — tcyc 76 Mode Select Hold Time, DATA[15:0], MODCLK, BKPT pins tMSH 0— ns 77 RESET Assertion Time12 tRSTA 4— tcyc 78 RESET Rise Time13 tRSTR —10 tcyc 100 CLKOUT High to Phase 1 Asserted14 tCHP1A 340 ns 101 CLKOUT High to Phase 2 Asserted14 tCHP2A 340 ns 102 Phase 1 Valid to AS or DS Asserted14 tP1VSA 10 — ns 103 Phase 2 Valid to AS or DS Asserted14 tP2VSN 10 — ns 104 AS or DS Valid to Phase 1 Negated14 tSAP1N 10 — ns 105 AS or DS Negated to Phase 2 Negated14 tSNP2N 10 — ns NOTES: 1. Refer to notes in Table A-18. Table A-16 16.78-MHz AC Timing (Continued) (V DD and V DDSYN = 5.0 Vdc ± 10 %, V SS = 0 Vdc, T A = T L to T H) 1 Num Characteristic Symbol Min Max Unit Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
