KM416RD8AS-RBM80 datasheet(54/64 Pages) SAMSUNG

Part #	KM416RD8AS-RBM80

Description	128Mbit RDRAM 256K x 16 bit x 2*16 Dependent Banks Direct RDRAMTM for Consumer Package

PDF	64 Pages

Scroll/Zoom	100%

Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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54 / 64 page

Page 51

KM416RD8AS

Direct RDRAM™

Rev. 0.9 July 1999

Target

The SCK clock is also used for sampling data on RSL inputs

in one situation. Figure 48 shows the PDN and NAP exit

sequences. If the PSX field of the INIT register is one (see

Figure 27), then the PDN and NAP exit sequences are broad-

cast; i.e. all RDRAMs that are in PDN or NAP will perform

the exit sequence. If the PSX field of the INIT register is

zero, then the PDN and NAP exit sequences are directed; i.e.

only one RDRAM that is in PDN or NAP will perform the

exit sequence.

The address of that RDRAM is specified on the DQA[5:0]

bus in the set hold window tS3/tH3 around the rising edge of

SCK. This is shown in Figure 57. The SCK timing point is

measured at the 50% level, and the DQA[5:0] bus signals are

measured at the VREF level.

Figure 57: CMOS Timing - Device Address for NAP or PDN Exit

VIH,CMOS

50%

VIL,CMOS

80%

20%

SCK

VDIH

VREF

VDIL

80%

20%

DQA[5:0]

tS3

tH3

PDEV

KM416RD8AS-RBM80 Datasheet(PDF) 54 Page - Samsung semiconductor