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PIC18LF4331 Datasheet(PDF) 295 Page - Microchip Technology

Part # PIC18LF4331
Description  28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
PDF  392 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18LF4331 Datasheet(HTML) 295 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS39616D-page 295
PIC18F2331/2431/4331/4431
BRA
Unconditional Branch
Syntax:
[ label ] BRA
n
Operands:
-1024
 n  1023
Operation:
(PC) + 2 + 2n
 PC
Status Affected:
None
Encoding:
1101
0nnn
nnnn
nnnn
Description:
Add the 2’s complement number, ‘2n’,
to the PC. Since the PC will have incre-
mented to fetch the next instruction, the
new address will be PC + 2 + 2n. This
instruction is a two-cycle instruction.
Words:
1
Cycles:
2
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read literal
‘n’
Process
Data
Write to
PC
No
operation
No
operation
No
operation
No
operation
Example:
HERE
BRA
Jump
Before Instruction
PC
=
address (HERE)
After Instruction
PC
=
address (Jump)
BSF
Bit Set f
Syntax:
[ label ] BSF
f,b[,a]
Operands:
0
 f  255
0
 b  7
a
[0,1]
Operation:
1
 f<b>
Status Affected:
None
Encoding:
1000
bbba
ffff
ffff
Description:
Bit ‘b’ in register, ‘f’, is set. If ‘a’ is ‘0’,
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then the
bank will be selected as per the BSR
value.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write
register ‘f’
Example:
BSF
FLAG_REG, 7
Before Instruction
FLAG_REG
=
0x0A
After Instruction
FLAG_REG
=
0x8A



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