PIC18LF4331 datasheet(300/392 Pages) MICROCHIP

300 / 392 page

PIC18F2331/2431/4331/4431

DS39616D-page 300

 2010 Microchip Technology Inc.

COMF

Complement f

Syntax:

[ label ] COMF

f [,d [,a]]

Operands:

 f  255

 [0,1]

Operation:

(f)

 dest

Status Affected:

N, Z

Encoding:

0001

11da

ffff

Description:

The contents of register, ‘f’, are comple-

mented. If ‘d’ is ‘0’, the result is stored in

W. If ‘d’ is ‘1’, the result is stored back in

will be selected, overriding the BSR

value. If ‘a’ = 1, then the bank will be

selected as per the BSR value.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write to

destination

Example:

COMF

REG,

Before Instruction

REG

0x13

After Instruction

REG

0x13

0xEC

CPFSEQ

Compare f with W, Skip if f = W

Syntax:

[ label ] CPFSEQ

f [,a]

Operands:

 f  255

 [0,1]

Operation:

(f) – (W),

skip if (f) = (W)

(unsigned comparison)

Status Affected:

None

Encoding:

0110

001a

ffff

Description:

Compares the contents of data memory

location, ‘f’, to the contents of W by

performing an unsigned subtraction.

If ‘f’ = W, then the fetched instruction is

discarded and a NOP is executed

instead, making this a two-cycle

instruction. If ‘a’ is ‘0’, the Access Bank

will be selected, overriding the BSR

value. If ‘a’ = 1, then the bank will be

selected as per the BSR value.

Words:

Cycles:

1(2)

Note:

3 cycles if skip and followed

by a 2-word instruction.

Q Cycle Activity:

Decode

Read

Process

Data

operation

If skip:

operation

If skip and followed by 2-word instruction:

operation

Example:

HERE

CPFSEQ REG

NEQUAL

EQUAL

Before Instruction

PC Address

HERE

REG

After Instruction

If REG

Address (EQUAL)

If REG



Address (NEQUAL)

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