PIC18LF4331 datasheet(119/392 Pages) MICROCHIP

119 / 392 page

 2010 Microchip Technology Inc.

DS39616D-page 119

PIC18F2331/2431/4331/4431

11.3

PORTC, TRISC and LATC

Registers

PORTC is an 8-bit wide, bidirectional port. The corre-

sponding Data Direction register is TRISC. Setting a

TRISC bit (= 1) will make the corresponding PORTC

pin an input (i.e., put the corresponding output driver in

a high-impedance mode). Clearing a TRISC bit (= 0)

will make the corresponding PORTC pin an output (i.e.,

put the contents of the output latch on the selected pin).

The Data Latch register (LATC) is also memory

mapped. Read-modify-write operations on the LATC

PORTC.

PORTC is multiplexed with several peripheral functions

(Table 11-5). The pins have Schmitt Trigger input

buffers.

When enabling peripheral functions, care should be

taken in defining TRIS bits for each PORTC pin. Some

peripherals override the TRIS bit to make a pin an output,

while other peripherals override the TRIS bit to make a

pin an input. The user should refer to the corresponding

peripheral section for the correct TRIS bit settings.

The contents of the TRISC register are affected by

peripheral overrides. Reading TRISC always returns

the current contents, even though a peripheral device

may be overriding one or more of the pins.

External interrupts, IN0, INT1 and INT2, are placed on

RC3, RC4 and RC5 pins, respectively.

SSP alternate interface pins, SDI/SDA, SCK/SCL and

SDO are placed on RC4, RC5 and RC7 pins,

respectively.

These pins are multiplexed on PORTC and PORTD by

using the SSPMX bit in the CONFIG3L register.

EUSART pins RX/DT and TX/CK are placed on RC7

and RC6 pins, respectively.

The alternate Timer5 external clock input, T5CKI, and

the alternate TMR0 external clock input, T0CKI, are

placed on RC3 and are multiplexed with the PORTD

(RD0) pin using the EXCLKMX Configuration bit in

CONFIG3H. Fault inputs to the 14-bit PWM module,

FLTA and FLTB, are located on RC1 and RC2. FLTA

input on RC1 is multiplexed with RD4 using the

FLTAMX bit.

The contents of the TRISC register are affected by

peripheral overrides. Reading TRISC always returns

the current contents, even though a peripheral device

may be overriding one or more of the pins.

EXAMPLE 11-3:

INITIALIZING PORTC

Note:

On a Power-on Reset, these pins are

configured as digital inputs.

CLRF

PORTC

; Initialize PORTC by

; clearing output

; data latches

CLRF

LATC

; Alternate method

; to clear output

; data latches

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISC

; Set RC<3:0> as inputs

; RC<5:4> as outputs

; RC<7:6> as inputs

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