PIC18LF4331 datasheet(122/392 Pages) MICROCHIP

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PIC18F2331/2431/4331/4431

DS39616D-page 122

 2010 Microchip Technology Inc.

11.4

PORTD, TRISD and LATD

Registers

PORTD is an 8-bit wide, bidirectional port. The

corresponding Data Direction register is TRISD.

Setting a TRISD bit (= 1) will make the corresponding

PORTD pin an input (i.e., put the corresponding output

driver in a high-impedance mode). Clearing a TRISD

bit (= 0) will make the corresponding PORTD pin an

output (i.e., put the contents of the output latch on the

selected pin).

The Data Latch register (LATD) is also memory

mapped. Read-modify-write operations on the LATD

PORTD.

All pins on PORTD are implemented with Schmitt

Trigger input buffers. Each pin is individually

configurable as an input or output.

PORTD includes PWM<7:6> complementary fourth

channel PWM outputs. PWM4 is the complementary

output of PWM5 (the third channel), which is multi-

plexed with the RB5 pin. This output can be used as the

alternate output using the PWM4MX Configuration bit

in CONFIG3H when the Single-Supply Programming

pin (PGM) is used on RB5.

RD1, RD2 and RD3 can be used as the alternate out-

put for SDO, SDI/SDA and SCK/SCL using the SSPMX

Configuration bit in CONFIG3H.

RD4 an be used as the alternate output for FLTA using

the FLTAMX Configuration bit in CONFIG3H.

EXAMPLE 11-4:

INITIALIZING PORTD

Note:

PORTD is only available on PIC18F4331/

4431 devices.

Note:

On a Power-on Reset, these pins are

configured as digital inputs.

CLRF

PORTD

; Initialize PORTD by

; clearing output

; data latches

CLRF

LATD

; Alternate method

; to clear output

; data latches

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISD

; Set RD<3:0> as inputs

; RD<5:4> as outputs

; RD<7:6> as inputs

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