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PIC18LF4331 Datasheet(PDF) 157 Page - Microchip Technology

Part # PIC18LF4331
Description  28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
PDF  392 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18LF4331 Datasheet(HTML) 157 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS39616D-page 157
PIC18F2331/2431/4331/4431
17.1.2
PERIOD MEASUREMENT MODE
The Period Measurement mode is selected by setting
CAPxM<3:0> = 0101. In this mode, the value of Timer5
is latched into the CAPxBUF register on the rising edge
of the input capture trigger and Timer5 is subsequently
reset to 0000h (optional by setting CAPxREN = 1) on
the next TCY (see capture and Reset relationship in
Figure 17-4).
17.1.3
PULSE-WIDTH MEASUREMENT
MODE
The Pulse-Width Measurement mode can be configured
for two different edge sequences, such that the pulse
width is based on either the falling to rising edge of the
CAPx input pin (CAPxM<3:0> = 0110), or on the rising
to falling edge (CAPxM<3:0> = 0111).
Timer5 is always reset on the edge when the
measurement is first initiated. For example, when the
measurement is based on the falling to rising edge,
Timer5 is first reset on the falling edge, and thereafter,
the timer value is captured on the rising edge. Upon
entry into the Pulse-Width Measurement mode, the
very first edge detected on the CAPx pin is always
captured. The TMR5 value is reset on the first active
edge (see Figure 17-5).
FIGURE 17-5:
PULSE-WIDTH MEASUREMENT MODE TIMING
CAP1 Pin(2)
0000
0002
0000
0001
0002
TMR5(1)
CAP1BUF(3)
0002
0014
0013
0012
0015
0015
0001
TMR5 Reset(4,5)
MOVWF CAP1CON
Instruction
0001
Note 1:
TMR5 is a synchronous time base input to the input capture; prescaler = 1:1. It increments on every Q1 rising edge.
2:
IC1 is configured in Pulse-Width Measurement mode (CAP1M<3:0> = 0111, rising to falling pulse-width
measurement). No noise filter on CAP1 input is used. The MOVWF instruction loads CAP1CON when W = 0111.
3:
TMR5 value is latched by CAP1BUF on TCY rising edge. In the event that a write to TMR5 coincides with an input cap-
ture event, the write will always take precedence. All Input Capture Buffers, CAP1BUF, CAP2BUF and CAP3BUF, are
updated with the incremented value of the time base on the next TCY clock edge when the capture event takes place
(see Note 4 when Reset occurs).
4:
TMR5 Reset is normally an asynchronous Reset signal to TMR5. When used in Pulse-Width Measurement mode, it
is always present on the edge that first initiates the pulse-width measurement (i.e., when configured in the rising to
falling Pulse-Width Measurement mode); it is active on each rising edge detected. In the falling to rising Pulse-Width
Measurement mode, it is active on each falling edge detected.
5:
TMR5 Reset pulse is activated on the capture edge. The CAP1REN bit has no bearing in this mode.
Execution(2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1Q2 Q3 Q4 Q1Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4



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