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PIC18LF4331 Datasheet(PDF) 174 Page - Microchip Technology |
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PIC18LF4331 Datasheet(HTML) 174 Page - Microchip Technology |
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174 / 392 page ![]() PIC18F2331/2431/4331/4431 DS39616D-page 174 2010 Microchip Technology Inc. FIGURE 18-1: POWER CONTROL PWM MODULE BLOCK DIAGRAM PDC3 PDC3 Buffer Output Driver Block PWMCON0 PTPER Buffer PWMCON1 PTPER PTMR Comparator Comparator Channel 3 PTCON SEVTCMP Comparator Special Event Trigger OVDCON<D/S> PWM Enable and Mode PWM Manual Control PWM PWM PWM Generator #3(1) SEVTDIR PTDIR DTCON Dead-Time Control Special Event Postscaler FLTA PWM0 PWM1 PWM2 PWM3 PWM4 PWM5 PWM FLTB(2) Note 1: Only PWM Generator 3 is shown in detail. The other generators are identical; their details are omitted for clarity. 2: PWM Generator 3 and its logic, PWM Channels 6 and 7, and FLTB and its associated logic are not implemented on PIC18F2331/2431 devices. PWM6(2) PWM7(2) FLTCONFIG Fault Pin Control Dead-Time Generator and Override Logic(2) Channel 2 Dead-Time Generator and Override Logic Channel 1 Dead-Time Generator and Override Logic Channel 0 Dead-Time Generator and Override Logic Internal Data Bus 8 8 8 8 8 8 8 8 8 8 Generator 1 Generator 0 Generator 2 |
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