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UPD30121 Datasheet(PDF) 53 Page - NEC |
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UPD30121 Datasheet(HTML) 53 Page - NEC |
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53 / 76 page  Data Sheet U14691EJ1V0DS00 53 µµµµPD30121 (12) System bus parameter (IOCHRDY) (3/3) Invalid When WISAA (0:2) bits = 010, BSEL bit = 1 BUSCLK (output) ADD (19:25), ADD (0:8) (output) ADD (9:18) (output) SHB# (output) MEMR#/MEMW#, IOR#/IOW# (output) IOCHRDY (input) ZWS# (input) DATA (output) DATA (input) Invalid tBCLKH2 tBCLKL2 tCLCH tCHAV tCHCL tCHRL tCHDV tDH tDS tRHCH tCLR tAVCKNote tCLCKNote tDVCL tAVCL Invalid MEMCS16#, IOCS16# (input) tCHSV tAVSV1 Note This indicates the minimum setup time to the BUSCLK signal rising edge. Remark The broken lines indicate high impedance. |
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