PIC18F010 datasheet(87/176 Pages) MICROCHIP

87 / 176 page

 2001 Microchip Technology Inc.

Preliminary

DS41142A-page 85

PIC18F010/020

CONFIG1L: CONFIGURATION BYTE (ADDRESS 300000h)

U-0

R/P-1

—

TR1

TW1

CP1

TR0

TW0

CP0

bit 7

bit 0

bit 7

Unimplemented: Read as ‘0’

bit 6

TR1: Table Read Protection bit (memory area > 0400h byte address)

= Table reads are enabled

= Table reads are disabled from access outside of this block

bit 5

TW1: Table Write Protection bit (memory area > 0400h byte address)

= Table writes are enabled

= Table writes are disabled from access outside of this block

bit 4

CP1: Code Protection bit (memory area > 0400h byte address)

= Program memory code protection off

= Program memory code protected

bit 3

DP: Data Protection bit for EEDATA Memory

= External reads and writes are enabled

= External reads and writes are disabled

bit 2

TR0: Table Read Protection bit (memory area > 0000h - 03FFh byte address)

= Table reads are enabled

= Table reads are disabled from access outside of this block

bit 1

TW0: Table Write Protection bit (memory area > 0000h - 03FFh byte address)

= Table writes are enabled

= Table writes are disabled from access outside of this block

bit 0

CP0: Code Protection bit (memory area > 0000h - 03FFh byte address)

= Program memory code protection off

= Program memory code protected

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

1 = Bit is set

0 = Bit is cleared

x = Bit is unknown

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