PIC18F010 datasheet(98/176 Pages) MICROCHIP

98 / 176 page

PIC18F010/020

DS41142A-page 96

Preliminary

 2001 Microchip Technology Inc.

TABLE 13-1:

OPCODE FIELD DESCRIPTIONS

Field

Description

RAM access bit

a = 0: RAM location in Access RAM (BSR register is ignored)

a = 1: RAM bank is specified by BSR register

ACCESS

ACCESS = 0: RAM access bit symbol

BANKED

BANKED = 1: RAM access bit symbol

bbb

Bit address within an 8-bit file register (0 to 7)

BSR

Bank Select Register. Used to select the current RAM bank.

Destination select bit;

d = 0: store result in WREG,

d = 1: store result in file register f.

dest

Destination either the WREG register or the specified register file location

8-bit Register file address (0x00 to 0xFF)

12-bit Register file address (0x000 to 0xFFF). This is the source address.

12-bit Register file address (0x000 to 0xFFF). This is the destination address.

Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value)

label

Label name

The mode of the TBLPTR register for the Table Read and Table Write instructions

Only used with Table Read and Table Write instructions:

No Change to register (such as TBLPTR with Table reads and writes)

Post-Increment register (such as TBLPTR with Table reads and writes)

Post-Decrement register (such as TBLPTR with Table reads and writes)

Pre-Increment register (such as TBLPTR with Table reads and writes)

The relative address (2’s complement number) for relative branch instructions, or the direct

address for Call/Branch and Return instructions

PRODH

Product of Multiply high byte (Register at address 0xFF4)

PRODL

Product of Multiply low byte (Register at address 0xFF3)

Fast Call / Return mode select bit.

s = 0: do not update into/from shadow registers

s = 1: certain registers loaded into/from shadow registers (Fast mode)

Unused or Unchanged (Register at address 0xFE8)

W = 0: Destination select bit symbol

WREG

Working register (accumulator) (Register at address 0xFE8)

Don't care (0 or 1)

The assembler will generate code with x = 0. It is the recommended form of use for compatibility

with all Microchip software tools.

TBLPTR

21-bit Table Pointer (points to a Program Memory location) (Register at address 0xFF6)

TABLAT

8-bit Table Latch (Register at address 0xFF5)

TOS

Top-of-Stack

Program Counter

PCL

Program Counter Low Byte (Register at address 0xFF9)

PCH

Program Counter High Byte

PCLATH

Program Counter High Byte Latch (Register at address 0xFFA)

PCLATU

Program Counter Upper Byte Latch (Register at address 0xFFB)

GIE

Global Interrupt Enable bit

WDT

Watchdog Timer

Time-out bit

Power-down bit

C, DC, Z, OV, N

ALU status bits Carry, Digit Carry, Zero, Overflow, Negative

[ ]

Optional

( )

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