PIC16LC773-04SLASHSP datasheet(119/200 Pages) MICROCHIP

119 / 200 page

PIC16C77X

Advance Information

DS30275A-page 119

The value that is in the ADRESH and ADRESL regis-

ters are not modified for a Power-on Reset. The

ADRESH and ADRESL registers will contain unknown

data after a Power-on Reset.

After the A/D module has been configured as desired,

the selected channel must be acquired before the con-

version is started. The analog input channels must

have their corresponding TRIS bits selected as an

input. To determine acquisition time, see Section 11.6.

After this acquisition time has elapsed the A/D conver-

sion can be started. The following steps should be fol-

lowed for doing an A/D conversion:

11.2

Configuring the A/D Module

11.3

Configuring Analog Port Pins

The ADCON1 and TRIS registers control the operation

of the A/D port pins. The port pins that are desired as

analog inputs must have their corresponding TRIS bit

set (input). If the TRIS bit is cleared (output), the digital

output level (VOH or VOL) will be converted.

The A/D operation is independent of the state of the

CHS3:CHS0 bits and the TRIS bits.

11.3.1

CONFIGURING THE REFERENCE

VOLTAGES

The VCFG bits in the ADCON1 register configure the

A/D module reference inputs.

The reference high

input can come from an internal reference (VRH) or

(VRL), an external reference (VREF+), or AVDD. The

low reference input can come from an internal refer-

ence (VRL), an external reference (VREF-), or AVSS. If

an external reference is chosen for the reference high

or reference low inputs, the port pin that multiplexes

the incoming external references is configured as an

analog input, regardless of the values contained in the

A/D port configuration bits (PCFG3:PCFG0).

After the A/D module has been configured as desired.

and the analog input channels have their correspond-

ing TRIS bits selected for port inputs, the selected

channel must be acquired before conversion is

started. The A/D conversion cycle can be initiated by

setting the GO/DONE bit. The A/D conversion begins,

and lasts for 13TAD. The following steps should be fol-

lowed for performing an A/D conversion:

Configure the A/D module

• Configure analog pins / voltage reference /

and digital I/O (ADCON1)

• Select A/D input channel (ADCON0)

• Select A/D conversion clock (ADCON0)

• Turn on A/D module (ADCON0)

Configure A/D interrupt (if required)

• Clear ADIF bit

• Set ADIE bit

• Set PEIE bit

• Set GIE bit

Wait the required acquisition time (3TAD)

Start conversion

• Set GO/DONE bit (ADCON0)

Wait 13TAD until A/D conversion is complete, by

either:

• Polling for the GO/DONE bit to be cleared

• Waiting for the A/D interrupt

Read A/D Result registers (ADRESH and

ADRESL), clear ADIF if required.

For next conversion, go to step 1, step 2 or step

3 as required.

Clearing the GO/DONE bit during a conversion will

abort the current conversion. The ADRESH and

ADRESL registers WILL be updated with the partially

completed A/D conversion value. That is, the ADRESH

and ADRESL registers WILL contain the value of the

current incomplete conversion.

Note 1: When reading the PORTA or PORTE reg-

ister, all pins configured as analog input

channels will read as cleared (a low level).

When reading the PORTB register, all

pins configured as analog input channels

will read as set (a high level). Pins config-

ured as digital inputs, will convert an ana-

log input.

Analog levels on a digitally

configured input will not affect the conver-

sion accuracy.

Note 2: Analog levels on any pin that is defined as

a digital input (including the ANx pins),

may cause the input buffer to consume

current that is out of the devices specifica-

tion.

Note:

Do not set the ADON bit and the

GO/DONE bit in the same instruction.

Doing so will cause the GO/DONE bit to be

automatically cleared.

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