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PIC16LC773-04/SP Datasheet(PDF) 121 Page - Microchip Technology

Part # PIC16LC773-04/SP
Description  28/40-Pin, 8-Bit CMOS Microcontrollers w/ 12-Bit A/D
PDF  200 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16LC773-04/SP Datasheet(HTML) 121 Page - Microchip Technology

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PIC16C77X
© 1999 Microchip Technology Inc.
Advance Information
DS30275A-page 121
11.4
Selecting the A/D Conversion Clock
The A/D conversion cycle requires 13TAD: 1 TAD for set-
tling time, and 12 TAD for conversion. The source of the
A/D conversion clock is software selected. The four
possible options for TAD are:
•2 TOSC
•8 TOSC
•32 TOSC
• Internal RC oscillator
Note that these options are the same as those of the
8-bit A/D.
For correct A/D conversions, the A/D conversion clock
(TAD) must be selected to ensure a minimum TAD time
of 1.6
µs. Table 11-1 shows the resultant TAD times
derived from the device operating frequencies and the
A/D clock source selected.
The ADIF bit is set on the rising edge of the 14th TAD.
The GO/DONE bit is cleared on the falling edge of the
14th TAD.
TABLE 11-1
TAD vs. DEVICE OPERATING FREQUENCIES
11.5
A/D Conversions
Figure 11-5 shows an example that performs an A/D
conversion. The port pins are configured as analog
inputs. The analog reference VREF+ is the device AVDD
and the analog reference VREF- is the device AVSS. The
A/D interrupt is enabled, and the A/D conversion clock
is TRC. The conversion is performed on the AN0 chan-
nel.
FIGURE 11-4: PERFORMING AN A/D CONVERSION
BCF
PIR1, ADIF
;Clear A/D Int Flag
BSF
STATUS, RP0
;Select Page 1
CLRF
ADCON1
;Configure A/D Inputs
BSF
PIE1, ADIE
;Enable A/D interrupt
BCF
STATUS, RP0
;Select Page 0
MOVLW
0xC1
;RC clock, A/D is on,
;Ch 0 is selected
MOVWF
ADCON0
;
BSF
INTCON, PEIE
;Enable Peripheral
BSF
INTCON, GIE
;Enable All Interrupts
;
; Ensure that the required sampling time for the
; selected input channel has lapsed. Then the
; conversion may be started.
BSF
ADCON0, GO
;Start A/D Conversion
:
;The ADIF bit will be
;set and the GO/DONE bit
:
;cleared upon completion-
;of the A/D conversion.
AD Clock Source (TAD)
Device Frequency
Operation
ADCS<1:0>
20 MHz
5 MHz
4 MHz
1.25 MHz
2 TOSC
00
100 ns(2)
400 ns(2)
500 ns(2)
1.6
µs
8 TOSC
01
800 ns(2)
1.6
µs2.0 µs6.4 µs
32 TOSC
10
1.6
µs6.4 µs
8.0
µs(3)
24
µs(3)
RC
11
2 - 6
µs(1,4)
2 - 6
µs(1,4)
2 - 6
µs(1,4)
2 - 6
µs(1,4)
Note 1: The RC source has a typical TAD time of 4
µs for VDD > 3.0V.
2: These values violate the minimum required TAD time.
3: For faster conversion times, the selection of another clock source is recommended.
4: When the device frequency is greater than 1 MHz, the RC A/D conversion clock source is only recommended if the conver-
sion will be performed during sleep.



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