PIC16LC773-04SLASHSP datasheet(125/200 Pages) MICROCHIP

125 / 200 page

PIC16C77X

Advance Information

DS30275A-page 125

11.7

Use of the CCP Trigger

An A/D conversion can be started by the “special event

trigger” of the CCP module. This requires that the

CCPnM<3:0> bits be programmed as 1011b and that

the A/D module is enabled (ADON is set). When the

trigger occurs, the GO/DONE bit will be set on Q2 to

start the A/D conversion and the Timer1 counter will

be reset to zero. Timer1 is reset to automatically

repeat the A/D conversion cycle, with minimal software

overhead (moving the ADRESH and ADRESL to the

desired location). The appropriate analog input chan-

nel must be selected before the “special event trigger”

sets the GO/DONE bit (starts a conversion cycle).

If the A/D module is not enabled (ADON is cleared),

then the “special event trigger” will be ignored by the

A/D module, but will still reset the Timer1 counter.

11.8

Effects of a RESET

A device reset forces all registers to their reset state.

This forces the A/D module to be turned off, and any

conversion is aborted. The value that is in the

ADRESH and ADRESL registers are not modified.

The ADRESH and ADRESL registers will contain

unknown data after a Power-on Reset.

11.9

Faster Conversion - Lower

Resolution Trade-off

Not all applications require a result with 12-bits of res-

olution, but may instead require a faster conversion

time. The A/D module allows users to make the

trade-off of conversion speed to resolution. Regard-

less of the resolution required, the acquisition time is

the same. To speed up the conversion, the A/D mod-

ule may be halted by clearing the GO/DONE bit after

the desired number of bits in the result have been con-

verted. Once the GO/DONE bit has been cleared, all

of the remaining A/D result bits are ‘0’.

The equation

to determine the time before the GO/DONE bit can be

switched is as follows:

Conversion time = N•TAD + 1TAD

Where: N = number of bits of resolution required,

and 1TAD is the amplifier settling time.

Since TAD is based from the device oscillator, the user

must use some method (a timer, software loop, etc.) to

determine when the A/D GO/DONE bit may be

cleared. Table 11-2 shows a comparison of time

required for a conversion with 4-bits of resolution, ver-

sus the normal 12-bit resolution conversion. The

example is for devices operating at 20 MHz. The A/D

clock is programmed for 32 TOSC.

TABLE 11-2

4-BIT vs. 12-BIT

CONVERSION TIMES

Freq.

(MHz)

Resolution

4-bit

12-bit

Tosc

50 ns

TAD = 32 Tosc

1.6

µs1.6 µs

1TAD+N•TAD

µs20.8 µs

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