TLE9263QX datasheet(87/164 Pages) INFINEON

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Data Sheet

Rev. 1.1, 2014-09-26

TLE9263QX

Wake and Voltage Monitoring Inputs

12.2

Functional Description

The wake input pins are edge-sensitive inputs with a switching threshold of typically 3V. This means that both

transitions, HIGH to LOW and LOW to HIGH, result in a signalization by the SBC. The signalization occurs either

in triggering the interrupt in SBC Normal Mode and SBC Stop Mode or by a wake up of the device in SBC Sleep

and SBC Fail-Safe Mode.

Two different wake detection modes can be selected via SPI:

•

Static sense: WK inputs are always active

•

Cyclic sense: WK inputs are only active for a certain time period (see Chapter 5.2.1)

Two different filter times of 16µs or 64µs can be selected to avoid a parasitic wake-up due to transients or EMC

disturbances in static sense configuration.

The filter time (tFWK1, tFWK2) is triggered by a level change crossing the switching threshold and a wake signal is

recognized if the input level will not cross again the threshold during the selected filter time.

Figure 39 shows a typical wake-up timing and parasitic filter.

Figure 39

Wake-up Filter Timing for Static Sense

The wake-up capability for each WK pin can be enabled or disabled via SPI command in the WK_CTRL_2

The wake source for a wake via a WKx pin can always be read in the register WK_STAT_1 at the bits WK1_WU,

WK2_WU, and WK3_WU.

The actual voltage level of the WK pin (LOW or HIGH) can always be read in SBC Normal and SBC Stop Mode

in the register WK_LVL_STAT. During Cyclic Sense, the register show the sampled levels of the respective WK

pin.

If FO2...3 are configured as WK inputs in its alternative function (16µs static filter time), then the wake events will

be signalled in the register WK_STAT_2.

VWK,th

VWK

tWK,f

No Wake Event

Wake Event

VWK,th

tWK,f

VINT

tINT

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