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FXLS8471Q Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc |
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FXLS8471Q Datasheet(HTML) 18 Page - Freescale Semiconductor, Inc |
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18 / 75 page ![]() FXLS8471Q Sensors 18 Freescale Semiconductor, Inc. Multiple-byte write The FXLS8471Q automatically increments the register address write pointer after a write command is received. Therefore, after following the steps of a single-byte write, multiple bytes of data can be written to sequential registers after each FXLS8471Q acknowledgment (ACK) is received. Figure 6. I2C timing diagram < Single-byte Read > Master ST Device Address[6:0] W Register Address[7:0] SR Device Address[6:0] R NAK SP Slave AK AK AK Data[7:0] < Multiple-byte Read > Master ST Device Address[6:0] W Register Address[7:0] SR Device Address[6:0] R AK Slave AK AK AK Data[7:0] Master AK AK NAK SP Slave Data[7:0] Data[7:0] Data[7:0] < Multiple-byte Write > Master ST Device Address[6:0] W Register Address[7:0] Data[7:0] Data[7:0] SP Slave AK AK AK AK < Single-byte Write > Master ST Device Address[6:0] W Register Address[7:0] Data[7:0] SP Slave AK AK AK Legend ST: Start Condition SP: Stop Condition NAK: No Acknowledge W: Write = 0 SR: Repeated Start Condition AK: Acknowledge R: Read = 1 |
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