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PCM3168APAPR Datasheet(PDF) 39 Page - Texas Instruments |
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PCM3168APAPR Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 66 page  PCM3168A www.ti.com SBAS452A – SEPTEMBER 2008 – REVISED JANUARY 2016 Table 15. Register: DAC Control 1 DEC HEX B7 B6 B5 B4 B3 B2 B1 B0 65 41 PSMDA MSDA2 MSDA1 MSDA0 FMTDA3 FMTDA2 FMTDA1 FMTDA0 PSMDA DAC Power-save mode select This bit selects the power-save mode for the OPEDA[3:0] function. OPEDA[3:0] is the control of power-save mode and normal operation for PSMDA = 0, or OPEDA[3:0] works as the control of DAC disable (not power-save mode) and normal operation for PSMDA = 1. Default value: 0. PSMDA DAC Power-save mode select 0 Power-save enable mode (default) 1 Power-save disable mode MSDA[2:0] DAC Master/slave mode select These bits control the audio interface mode for DAC operation. Default value: 000 (slave mode). MSDA DAC Master/slave mode select 000 Slave mode (default) 001 Master mode, 768 fS 010 Master mode, 512 fS 011 Master mode, 384 fS 100 Master mode, 256 fS 101 Master mode, 192 fS 110 Master mode, 128 fS 111 Reserved FMTDA[3:0] DAC Audio interface format select These bits control the audio interface format for DAC operation. Details of the format, and any related restrictions with the system clock and master/slave mode, are described in Audio Data Interface Formats and Timing. Default value: 0000 (24-bit I2S format). FMTDA DAC Audio interface format select 0000 24-bit I2S format (default) 0001 24-bit left-justified format 0010 24-bit right-justified format 0011 16-bit right-justified format 0100 24-bit I2S mode DSP format 0101 24-bit left-justified mode DSP format 0110 24-bit I2S mode TDM format 0111 24-bit left-justified mode TDM format 1000 24-bit high-speed I2S mode TDM format 1001 24-bit high-speed left-justified mode TDM format 101x Reserved 11xx Reserved Copyright © 2008–2016, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Links: PCM3168A |
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