V62SLASH12615-01XE-R datasheet(20/92 Pages) TI1

20 / 92 page

T2.2.4

T2.2.1

32 clocks

T2.2.2

T2.2.3

Input

Output

X1 clock

Hardware

RESET_N

MDC

Latch-in of hardware

configuration pins

Dual function pins

become enabled as outputs

DP83848-EP

SLLSEC6D – SEPTEMBER 2012 – REVISED JUNE 2013

www.ti.com

3.5.2

Reset Timing

Figure 3-3. Reset Timing

xxx

PARAMETER

DESCRIPTION

NOTES(1)

MIN

TYP

MAX

UNIT

T2.2.1

Post RESET Stabilization time prior to

MDIO is pulled high for 32-bit serial

µs

MDC preamble for register accesses

management initialization

T2.2.2

Hardware Configuration Latchin Time

Hardware Configuration Pins are described

µs

from the Deassertion of RESET (either

in the Pin Description section

soft or hard)

T2.2.3

Hardware Configuration pins transition

to output drivers

T2.2.4

RESET pulse width

X1 Clock must be stable for at min. of 1µs

µs

during RESET pulse low time

(1)

It is important to choose pull-up and/or pull-down resistors for each of the hardware configuration pins that provide fast RC time

constants in order to latch-in the proper value prior to the pin transitioning to an output driver.

ELECTRICAL SPECIFICATIONS

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V62/12615-01XE-R Datasheet(PDF) 20 Page - Texas Instruments

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