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PM6344 Datasheet(PDF) 36 Page - PMC-Sierra, Inc

Part # PM6344
Description  QUADRUPLE E1 FRAMER
PDF  256 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM6344 Datasheet(HTML) 36 Page - PMC-Sierra, Inc

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STANDARD PRODUCT
PMC-Sierra, Inc.
PM6344 EQUAD
PMC-951013
ISSUE 5
QUADRUPLE E1 FRAMER
23
Pin Name
Type
Pin No.
Function
TDLCLK[1]
TDLCLK[2]
TDLCLK[3]
TDLCLK[4]/
Output
109
110
111
112
Transmit Data Link Clock (TDLCLK[4:1]). The
TDLCLK[4:1] signals are available on this output when
the associated internal HDLC transmitter (XFDL) is
disabled from use, or if fractional E1 insertion is
selected. The rising edge of TDLCLK[x] is used to
sample the data-link or fractional E1 data stream
contained on the associated TDLSIG[x] input. When the
EQUAD is not configured to transmit a data link and
fractional E1 is disabled, the TDLCLK[x] output is held
low.
TDLUDR[1]
TDLUDR[2]
TDLUDR[3]
TDLUDR[4]
Transmit Data Link Underrun (TDLUDR[4:1]). The
TDLUDR[4:1] signals are available on this output when
the associated XFDL is enabled. TDLUDR[x] goes high
when the processor has failed to service the TDLINT[x]
interrupt before the transmit buffer is emptied.
TCLKO[1]
TCLKO[2]
TCLKO[3]
TCLKO[4]
Output
14
17
24
27
Transmit Clock Output (TCLKO[4:1] ). The TDP[4:1],
TDN[4:1], and TDD[4:1] outputs may be enabled to be
updated on the rising or falling edge of the TCLKO[4:1]
outputs. TCLKO[x] is a 2.048 MHz clock that is
adequately jitter and wander free in absolute terms to
permit an acceptable E1 signal to be generated.
Depending on the configuration of the EQUAD,
TCLKO[x] may be derived from TCLKI[x], RCLKO[x], or
BTCLK[x], with or without jitter attenuation.
TDP[1]
TDP[2]
TDP[3]
TDP[4] /
Output
15
22
25
28
Transmit Digital Positive Line Pulse (TDP[4:1]). These
signals are available on the output when the EQUAD is
configured to transmit dual-rail data. The TDP[x] signal
can be formatted for either RZ or NRZ waveforms, and
can be enabled to be updated on the rising or falling
edge of the associated TCLKO[x].
TDD[1]
TDD[2]
TDD[3]
TDD[4]
Transmit Digital Data (TDD[4:1]). These signals are
available on the output when configured to transmit
single-rail data. The TDD[x] signal may be enabled to
be updated on the rising or falling edge of the
associated TCLKO[x].



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