PM6344 datasheet(14/256 Pages) PMC

14 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

FEATURES

• Integrates four full-featured E1 framers and transmitters in a single device for

terminating duplex E1 signals.

• Software and functionally compatible with the PM6341 E1XC Single E1

Transceiver.

• Pin compatible with the PM4344 Quad T1 Framer device.

• Provides an 8-bit microprocessor bus interface for configuration, control, and

status monitoring.

• Low power CMOS technology

• Available in a 128 pin PQFP package.

Each one of four receiver sections:

• Recovers clock and data using a digital phase locked loop for high jitter

tolerance. A direct clock input is provided to allow clock recovery to be by-

passed.

• Accepts dual rail or single rail digital PCM inputs.

• Supports HDB3 or AMI line code.

• Accepts gapped data streams to support higher rate demultiplexing.

• Frames to a G.704 2048 kbit/s signal within 1 ms.

• Frames to the signaling multiframe alignment when enabled.

• Frames to the CRC multiframe alignment when enabled.

• Provides loss of signal detection, and indicates loss of frame alignment

(OOF), loss of signaling multiframe alignment and loss of CRC multiframe

alignment.

• Supports line and path performance monitoring according to ITU-T

recommendations. Accumulators are provided for counting:

• CRC-4 errors to 1000 per second;

PM6344 Datasheet(PDF) 14 Page - PMC-Sierra, Inc