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PM6344 Datasheet(PDF) 77 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 77 Page - PMC-Sierra, Inc |
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77 / 256 page  STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 64 RUNI: The RUNI bit enables the interface to receive unipolar digital data and line code violation indications on the multifunction pins RDP/RDD[x] and RDN/RLCV[x]. When RUNI is set to logic 1, the RDP/RDD[x] and RDN/RLCV[x] multifunction pins become the data and line code violation inputs, RDD[x] and RLCV[x], sampled on the selected RCLKI[x] edge. When RUNI is set to logic 0, the RDP/RDD[x] and RDN/RLCV[x] multifunction pins become the positive and negative pulse inputs, RDP[x] and RDN[x], sampled on the selected RCLKI[x] edge. RFALL: The RFALL bit enables the Receive Interface to sample the multifunction pins on the falling RCLKI[x] edge. When RFALL is set to logic 1, the interface is enabled to sample either the RDD[x] and RLCV[x] inputs, or the RDP[x] and RDN[x] inputs, on the falling RCLKI[x] edge. When RFALL is set to logic 0, the interface is enabled to sample the inputs on the rising RCLKI[x] edge. |
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