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PM8313 Datasheet(PDF) 77 Page - PMC-Sierra, Inc |
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PM8313 Datasheet(HTML) 77 Page - PMC-Sierra, Inc |
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77 / 192 page  PM8313 D3MX DATA SHEET PMC-920702 ISSUE 5 M13 MULTIPLEXER 67 data bus driver pads. When IOTST and PMCTST are both logic 0, the DBCTRL bit is ignored. IOTST: The IOTST bit is used to allow normal microprocessor access to the test registers and control the test mode in each TSB block in the D3MX for board level testing. When IOTST is a logic 1, all blocks are held in test mode and the microprocessor may write to a block's test mode 0 registers to manipulate the outputs of the block and consequently the device outputs (refer to the "Test Mode 0 Details" in the "Test Features" section). HIZIO, HIZDATA: The HIZIO and HIZDATA bits control the tri-state modes of the D3MX . While the HIZIO bit is a logic 1, all output pins of the D3MX except the data bus are held in a high-impedance state. The microprocessor interface is still active. While the HIZDATA bit is a logic 1, the data bus is also held in a high- impedance state which inhibits microprocessor read cycles. |
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