PM8313 datasheet(97/192 Pages) PMC

97 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

Unused

Bit 5

Unused

Bit 4

Unused

Bit 3

Unused

Bit 2

Unused

Bit 1

R/W

Bit 0

R/W

EN:

The enable bit (EN) controls the overall operation of the RFDL TSB. When

set, the RDFL TSB is enabled; when reset the RFDL TSB is disabled. When

the TSB is disabled, the FIFO and interrupts are all cleared, however, the

programming of the Interrupt Control/Status Register is not affected. When

the TSB is enabled, it will immediately begin looking for flags.

Setting the terminate reception bit (TR) forces the RFDL TSB to immediately

terminate the reception of the current LAPD frame, empty the FIFO, clear the

interrupts, and begin searching for a new flag sequence. The RFDL handles

the TR input in the same manner as if the EN bit had been cleared and then

set. The TR bit in the Configuration register will reset itself after a rising and

falling edge have occurred on the CLK input to the RFDL TSB once the write

to this register has completed and WEB goes inactive. If the Configuration

The RFDL TSB handles the TR input in the same manner as clearing and

setting the EN bit, therefore, the RFDL state machine will begin searching for

flags and an interrupt will be generated when the first flag is detected.

PM8313 Datasheet(PDF) 97 Page - PMC-Sierra, Inc