HMC832LP6GETR datasheet(39/49 Pages) AD

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HMC832

Data Sheet

LOCK DETECT REGISTER

Table 21. Register 0x07, Lock Detect Register (Default 0x00014D)

Bit

Type

Name

Width

Default

Description

2:0

R/W

LKD_WINCNT_MAX

Lock detect window sets the number of consecutive counts of divided VCO

that must land inside the lock detect window to declare lock

0: 5

1: 32

2: 96

3: 256

4: 512

5: 2048

6: 8192

7: 65,535

R/W

Enable internal lock

detect

See the Serial Port section

5:4

R/W

Reserved

R/W

Lock detect window

type

Lock detection window timer selection

1: digital programmable timer

0: analog one shot, nominal 10 ns window

9:7

R/W

LD digital window

duration

Lock detection, digital window duration

0: half cycle

1: one cycle

2: two cycles

3: four cycles

4: eight cycles

5: 16 cycles

6: 32 cycles

7: 64 cycles

11:10

R/W

LD digital timer

frequency control

Lock detect digital timer frequency control, see the Lock Detect section for

more information

00: fastest

11: slowest

R/W

Reserved

R/W

Automatic relock: one

try

1: attempts to relock if lock detect fails for any reason; tries one time only

ANALOG ENABLE (EN) REGISTER

Table 22. Register 0x08, Analog EN Register, (Default 0xC1BEFF)

Bit

Type

Name

Width

Default

Description

4:0

R/W

Reserved

31d

Reserved

R/W

GPO_PAD_EN

0: disables the LD/SDO pin

1: enables GPO port or allows a shared SPI

When Bit 5 = 1 and Register 0xF[7] = 1, the LD_SDO pin is always driven, which

is required for use of the GPO port

When Bit 5 = 1 and Register 0xF[7] = 0, SDO is off when an unmatched chip

address is seen on the SPI, allowing a shared SPI with other compatible devices

9:6

R/W

Reserved

11d

Reserved

R/W

VCO buffer and

prescaler bias

enable

VCO buffer and prescaler bias enable

20:11

R/W

Reserved

55d

Reserved

Rev. A | Page 38 of 48

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