HMC832LP6GETR datasheet(40/49 Pages) AD

40 / 49 page

Data Sheet

HMC832

Rev. A | Page 39 of 48

Bit

Type

Name

Width

Default

Description

R/W

High frequency

reference

Program to 1 for XTAL > 200 MHz

23:22

R/W

Reserved

CHARGE PUMP REGISTER

Table 23. Register 0x09, Charge Pump Register (Default 0x403264)

Bit

Type

Name

Width

Default

Description

6:0

R/W

CP DN gain

100d

0x64

Charge pump DN gain control, 20 μA per step. Affects fractional phase

noise and lock detect settings.

0d = 0 μA

1d = 20 μA

2d = 40 μA

…

127d = 2.54 mA

13:7

R/W

CP UP gain

100d

0x64

Charge pump up gain control, 20 μA per step. Affects fractional phase

noise and lock detect settings.

0d = 0 μA

1d = 20 μA

2d = 40 μA

…

127d = 2.54 mA

20:14

R/W

Offset magnitude

Charge pump offset control, 5 μA per step. Affects fractional phase

noise and lock detect settings.

0d = 0 μA

1d = 5 μA

2d = 10 μA

…

127d = 635 μA

R/W

Offset up enable

Recommended setting = 1 in fractional mode, 0 otherwise.

R/W

Offset DN enable

Recommended setting = 0.

R/W

Reserved

Reserved.

AUTOCALIBRATION REGISTER

Table 24. Register 0x0A, VCO Autocalibration Configuration Register (Default 0x002205)

Bit

Type

Name

Width

Default

Description

2:0

R/W

VTUNE resolution

R divider cycles

0: 1 cycle

1: 2 cycles

2: 4 cycles

…

7: 256 cycles

9:3

R/W

Reserved

64d

Program 8d

R/W

Force curve

Program 0

R/W

Autocalibration disable

Program 0 for normal operation using VCO autocalibration

R/W

No VSPI trigger

0: normal operation

1: this bit disables the serial transfers to the VCO subsystem (via

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