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HMC832LP6GETR Datasheet(PDF) 6 Page - Analog Devices |
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HMC832LP6GETR Datasheet(HTML) 6 Page - Analog Devices |
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6 / 49 page ![]() Data Sheet HMC832 Parameter Test Conditions/Comments Min Typ Max Unit VCO CHARACTERISTICS VCO Tuning Sensitivity 2800 MHz Measured with 1.5 V on VTUNE; see Figure 29 24.6 MHz/V 2400 MHz Measured with 1.5 V on VTUNE; see Figure 29 25.8 MHz/V 2000 MHz Measured with 1.5 V on VTUNE; see Figure 29 25.2 MHz/V 1600 MHz Measured with 1.5 V on VTUNE; see Figure 29 24.3 MHz/V VCO Supply Pushing Measured with 1.5 V on VTUNE 2.8 MHz/V 1 Measured with 100 Ω external termination. See Reference Input Stage section for more details. 2 Slew rate of ≥0.5 ns/V is recommended, see Reference Input Stage section for more details. Frequency is guaranteed across process voltage and temperature from −40°C to +85°C. 3 This maximum PD frequency can only be achieved if the minimum N value is respected. For example, in the case of fractional mode, the maximum PD frequency = fVCO/20 or 100 MHz, whichever is less. 4 For detailed current consumption information, refer to Figure 33 and Figure 36. 5 Gain setting = 6 (VCO_REG 0x07[3:0] = 6d) in high performance mode (VCO_REG 0x03[1:0] = 3d). TIMING SPECIFICATIONS SPI Write Timing Characteristics AVDD = DVDD = 3 V, AGND = DGND = 0 V. Table 2. SPI Write Timing Characteristics, See Figure 47 Parameter Test Conditions/Comments Min Typ Max Unit t1 SDI setup time to SCLK rising edge 3 ns t2 SCLK rising edge to SDI hold time 3 ns t3 SEN low duration 10 ns t4 SEN high duration 10 ns t5 SCLK 32nd rising edge to SEN rising edge 10 ns t6 Recovery time 20 ns Maximum serial port clock speed 50 MHz Table 3. SPI Read Timing Characteristics, See Figure 48 Parameter Test Conditions/Comments Min Typ Max Unit t1 SDI setup time to SCK rising edge 3 ns t2 SCK rising edge to SDI hold time 3 ns t3 SEN low duration 10 ns t4 SEN high duration 10 ns t5 SCK rising edge to SDO time 8.2 ns + 0.2 ns/pF ns t6 Recovery time 10 ns t7 SCK 32nd rising edge to SEN rising edge 10 ns Rev. A | Page 5 of 48 |
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