HMC832LP6GETR datasheet(26/49 Pages) AD

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Data Sheet

HMC832

Integer Frequency Tuning

In integer mode the digital Δ-Σ modulator is shut off and the N

divider (Register 0x03) may be programmed to any integer

value in the range of 16 to 219 − 1. To run in integer mode,

configure Register 0x06 (as described in the Integer Mode

section), then program the integer portion of the frequency as

explained by Equation 12, ignoring the fractional part.

1. Disable the fractional modulator, Register 0x06[11] = 0

2. Bypass the Δ-Σ modulator Register 0x06[7] = 1

3. To tune to frequencies (<1500 MHz), select the appropriate

output divider value VCO_REG 0x02[5:0].

Writing to VCO subsystem registers (VCO_REG 0x02[5:0] and

VCO_REG 0x03[0] in this case) is accomplished indirectly through

PLL Register 5 (Register 0x05). More information on communi-

cating with the VCO subsystem through PLL Register 0x05 is

available in the VCO Serial Port Interface (VSPI) section.

Fractional Mode

The HMC832 is placed in fractional mode by setting the

following registers:

•

Enable the fractional modulator, Register 0x06[11] = 1.

•

Connect the Δ-Σ modulator in circuit, Register 0x06[7] = 0.

Fractional Frequency Tuning

This is a generic example, with the goal of explaining how to

program the output frequency. Actual variables are dependant

upon the reference in use.

The HMC832 in fractional mode can achieve frequencies at

fractional multiples of the reference. The frequency of the

HMC832, fVCO, is given by

FRAC

INT

FRAC

INT

XTAL

VCO

)

(

(12)

fOUT = fVCO/k

(13)

where:

fOUT is the output frequency after any potential dividers.

k is 1 for fundamental, or k = 2, 4, 6, … 58, 60, 62 depending on

the selected output divider value (Register 0x05[5:0] indirectly

to VCO_REG 0x02[5:0]).

NINT is the integer division ratio, Register 0x03, an integer

number between 20 and 524,284.

NFRAC is the fractional part, from 0.0 to 0.99999..., NFRAC =

R is the reference path division ratio, Register 0x02.

fXTAL is the frequency of the reference oscillator input.

fPD is the PD operating frequency, fXTAL/R.

For example:

fOUT = 1402.5 MHz

k = 2

fvco = 2,805 MHz

fXTAL = 50 MHz

R = 1

fPD = 50 MHz

NINT = 56

NFRAC = 0.1

1,677,722.

error

fVCO

192

2805

1677722











 +

(14)

error

VCO

OUT

596

MHz

1402

(15)

In this example, the output frequency of 1402.5 MHz is achieved by

programming the 19-bit binary value of 56d = 0x38 into the

INTG_REG bit in Register 0x03, and the 24-bit binary value of

1677722d = 0x19999A into the FRAC bit in Register 0x04. The

0.596 Hz quantization error can be eliminated using the exact

frequency mode, if required. In this example, the output

fundamental is divided by 2. Specific control of the output

divider is required. See the VCO Subsystem Register Map

section and description for details.

Exact Frequency Tuning

Due to quantization effects, the absolute frequency precision of

a fractional PLL is normally limited by the number of bits in the

fractional modulator. For example, a 24-bit fractional modulator

has frequency resolution set by the phase detector (PD) compari-

son rate divided by 224. The value 224 in the denominator is

sometimes referred to as the modulus. Analog Devices PLLs use

a fixed modulus, which is a binary number. In some types of

fractional PLLs the modulus is variable, allowing exact frequency

steps to be achieved with decimal step sizes. Unfortunately,

small steps using small modulus values result in large spurious

outputs at multiples of the modulus period (channel step size).

For this reason, Analog Devices PLLs use a large fixed modulus.

Normally, the step size is set by the size of the fixed modulus. In

the case of a 50 MHz PD rate, a modulus of 224 would result in a

2.98 Hz step resolution, or 0.0596 ppm. In some applications it is

necessary to have exact frequency steps, and even an error of

3 Hz cannot be tolerated.

Fractional PLLs are able to generate exact frequencies (with

zero frequency error) if N can be exactly represented in binary

(for example, N = 50.0, 50.5, 50.25, 50.75, and so forth). Note

that, some common frequencies cannot be exactly represented.

For example, NFRAC = 0.1 = 1/10 must be approximated as

round((0.1 x 224)/224 ) ≈ 0.100000024. At fPD = 50 MHz, this

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