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HMC832LP6GETR Datasheet(PDF) 1 Page - Analog Devices |
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HMC832LP6GETR Datasheet(HTML) 1 Page - Analog Devices |
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1 / 49 page  Fractional-N PLL with Integrated VCO 25 MHz to 3000 MHz Data Sheet HMC832 FEATURES RF bandwidth: 25 MHz to 3000 MHz 3.3 V supply Maximum phase detector rate: 100 MHz Ultralow phase noise −110 dBc/Hz in band, typical Fractional figure of merit (FOM): −226 dBc/Hz 24-bit step size, resolution 3 Hz typical Exact frequency mode with 0 Hz frequency error Fast frequency hopping 40-lead 6 mm × 6 mm SMT package: 36 mm2 APPLICATIONS Cellular infrastructure Microwave radio WiMax, WiFi Communications test equipment CATV equipment DDS replacement Military Tunable reference source for spurious-free performance FUNCTIONAL BLOCK DIAGRAM Figure 1. GENERAL DESCRIPTION The HMC832 is a 3.3 V, high performance, wideband, frac- tional-N, phase-locked loop (PLL) that features an integrated voltage controlled oscillator (VCO) with a fundamental frequency of 1500 MHz to 3000 MHz, and an integrated VCO output divider (divide by 1/2/4/6/…60/62), that enables the HMC832 to generate continuous frequencies from 25 MHz to 3000 MHz. The integrated phase detector (PD) and delta-sigma (Δ-Σ) modulator, capable of operating at up to 100 MHz, permit wider loop bandwidths and faster frequency tuning with excellent spectral performance. Industry leading phase noise and spurious performance, across all frequencies, enable the HMC832 to minimize blocker effects, and to improve receiver sensitivity and transmitter spectral purity. A low noise floor (−160 dBc/Hz) eliminates any contri- bution to modulator/mixer noise floor in transmitter applications. The HMC832 is footprint-compatible to the market leading HMC830 PLL with integrated VCO. It features 3.3 V supply and an innovative programmable performance technology that enables the HMC832 to tailor current consumption and corresponding noise floor performance to individual applications by selecting either a low current consumption mode or a high performance mode for an improved noise floor performance. Additional features of the HMC832 include 12 dB of RF output gain control in 1 dB steps; output mute function to automatically mute the output during frequency changes when the device is not locked; selectable output return loss; programmable differential or single-ended outputs, with the ability to select either output in single-ended mode; and a Δ-Σ modulator exact frequency mode that enables users to generate output frequencies with 0 Hz frequency error. CP EN EN VTUNE RF_N RF_P SEN CP PFD ÷R ÷N ÷1, 2, 4, 6, ...62 MODULATOR XREFP LD/SDO SCK SDI CAL VCO LOCK DETECT HMC832 SPI PROGRAMMING INTERFACE CONTROL Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com |
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