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BLUENRG-2 Datasheet(PDF) 130 Page - STMicroelectronics |
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BLUENRG-2 Datasheet(HTML) 130 Page - STMicroelectronics |
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130 / 190 page ![]() Functional details BlueNRG-2 130/190 DocID030675 Rev 2 This mode is a combination of mode 3 and mode 2,and makes it possible to operate Timer/Counter 2 as a single input-capture timer while Timer/Counter 1 can be used as a system timer as described above. TnCNT1 starts counting down once a clock has been enabled. Upon underflow, TnCNT1 is reloaded from the TnCRB register, and counting proceeds downward from that value. If enabled, the TnA pin toggles upon every underflow of TnCNT1. The initial value of the TnA output signal can be selected by software to be either high or low. In addition, the TnAPND interrupt-pending flag is set and a timer interrupt 1 is generated if the TnAIEN bit is set. Since TnA toggles upon every underflow, a 50% duty-cycle PWM signal can be generated on TnA without requiring any interaction with the software or the CPU. TnCNT2 starts counting down once a clock has been enabled. When a transition is received on TnB, the value contained in TnCNT2 is transferred to TnCRB, and the interrupt-pending flag TnBPND is set. A timer interrupt 1is generated if enabled. The software can enable a pReset of the counter to 0xFFFF upon detection of a transition on TnB. In this case, the current value of TnCNT2 is transferred to TnCRB, followed by a pReset of the counter to 0xFFFF. TnCNT2 starts counting downwards from 0xFFFF until the next transition is received on TnB, which causes the procedure of capture and pReset to be repeated. The underflow of TnCNT2 causes the TnDPND interrupt-pending flag to be set, and can also generate a timer interrupt 2 if enabled. The input signal on TnB must have a pulse width equal to or greater than one system clock cycle. TnB can be configured to sense either rising or falling edges. TnCNT2 cannot operate in the pulse-accumulate or external-event counter modes since the TnB input is used as a capture input. Selecting either of these modes for TnCNT2 causes TnCNT2 to be stopped. However, all available clock source modes may be selected for TnCNT1. Thus by using TnCNT1, it is possible to determine the number of capture events on TnB, or the elapsed time between capture events on TnB. 3.13.2.6 Timer IO functions There are two pins associated with each instance of the MFTX. The pins are called TnA and TnB. The functionality of TnA and TnB depends on the mode of operation and the value of the TnAEN and TnBEN bits. Table 157: "MFT IO functions" shows the function of TnA and TnB for various modes of operation. Note that if TnA functions as a PWM output, TnAOUT defines the initial and present value of TnA. For example, if the user wishes to start with TnA high, TnAOUT needs to be set before enabling the timer clock. Table 157: MFT IO functions Pin TnAEN TnBEN Mode 1 Mode 1a Mode 2 Mode 3 Mode 4 PWM and counter PWM pulse train Dual-input capture and counter Dual independent counter Input capture plus timer TnA TnAEN = 0 TnBEN = X No output No output Capture TnCNT1 into TnCRB No output toggle No output toggle TnAEN = 1 TnBEN = X Toggle output on underflow of TnCNT1 Toggle output on underflow of TnCNT1 Capture TnCNT1 into TnCRA and preset TnCNT1 Toggle output on underflow of TnCNT1 TnB TnAEN = X TnBEN = 0 External event or pulse accumulate input External event if TnPTSE = 0 Capture TnCNT1 into TnCRB External event or pulse accumulate input Capture TnCNT2 into TnCRB |
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