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BLUENRG-2 Datasheet(PDF) 132 Page - STMicroelectronics |
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BLUENRG-2 Datasheet(HTML) 132 Page - STMicroelectronics |
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132 / 190 page  Functional details BlueNRG-2 132/190 DocID030675 Rev 2 Sys. Int. Interrupt pending flag Mode 1 Mode 1a Mode 2 Mode 3 Mode 4 PWM and counter PWM pulse train Dual-input capture and counter Dual independent counter Input capture plus timer Timer int. 2 (MFT1B, MFT2B) TnDPND TnCNT2 underflow TnCNT2 underflow TnCNT2 underflow TnCNT2 reload from TnCRB TnCNT2 underflow 3.13.3 MFT registers MFT1 peripheral base address (MFT1_BASE_ADDR) 0x40D00000. MFT2 peripheral base address (MFT2_BASE_ADDR) 0x40E00000. Table 159: MFTX registers Address offset Name RW Reset Description 0x00 TNCNT1 RW 0x00000000 Timer / Counter1 register 0x04 TnCRA RW 0x00000000 Capture / Reload A register 0x08 TNCRB RW 0x00000000 Capture / Reload B register 0x0C TNCNT2 RW 0x00000000 Timer / Counter2 register 0x10 TNPRSC RW 0x00000000 Clock prescaler register 0x14 TNCKC RW 0x00000000 Clock unit control register. Refer to the detailed description below. 0x18 TNMCTRL RW 0x00000000 Timer mode control register. Refer to the detailed description below. 0x1C TNICTRL RW 0x00000000 Timer interrupt control register. Refer to the detailed description below. 0x20 TNICLR W 0x00000000 Timer interrupt clear register. Refer to the detailed description below. Table 160: MFTX – TNCNT1 register description: address offset MFTX_BASE_ADDR+0x00 Bit Field name Reset RW Description 15:0 TNCNT1 0x0000 RW Register counter of timer1. 31:16 RESERVED 0x0 R RESERVED Table 161: MFTX – TNCRA register description: address offset MFTX_BASE_ADDR+0x04 Bit Field name Reset RW Description 31:0 TNCRA 0x0000 RW Register capture/reload A. 31:16 RESERVED 0x0 R RESERVED Table 162: MFTX – TNCRB register description: address offset MFTX_BASE_ADDR+0x08 Bit Field name Reset RW Description 31:0 TNCRB 0x0000 RW Register capture/reload B. |
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