T48C893 datasheet(20/82 Pages) ATMEL

20 / 82 page

T48C893

Rev. A4, 22-Jan-02

20 (82)

System Configuration Register (SC)

Primary register address: ’3’hex

Bit 3

Bit 2

Bit 1

Bit 0

SC: write

BOT

–––

OS1

OS0

Reset value: 1x11b

BOT

Brown-Out Threshold

BOT = 1, low brown-out voltage threshold (1.7 V)

BOT = 0, high brown-out voltage threshold (2.0 V)

OS1

Oscillator Select 1

OS0

Oscillator Select 0

Mode

OS1

OS0

Input for SUBCL

Selected Oscillators

Cin / 16

RC–oscillator 1 and external input clock

Cin / 16

RC-oscillator 1 and RC-oscillator 2

Cin / 16

RC-oscillator 1 and 4-MHz crystal oscillator

32 kHz

RC-oscillator 1 and 32-kHz crystal oscillator

If the bit CCS = 0 in the CM-register the RC-oscillator 1 always stops.

3.6

Power-down Modes

The sleep mode is a shut-down condition which is used to

reduce the average system power consumption in applica-

tions where the

µC is not fully utilized. In this mode, the

system clock is stopped. The sleep mode is entered via the

SLEEP instruction. This instruction sets the interrupt en-

able bit (I) in the condition code register to enable all

interrupts and stops the core. During the sleep mode the

peripheral modules remain active and are able to generate

interrupts. The

µC exits the sleep mode by carrying out

any interrupt or a reset.

The sleep mode can only be kept when none of the inter-

rupt pending or active register bits are set. The application

of the $AUTOSLEEP routine ensures the correct function

of the sleep mode. For standard applications use the $AU-

TOSLEEP routine to enter the power-down mode. Using

the SLEEP instruction instead of the $AUTOSLEEP fol-

lowing an I/O instruction requires to insert 3 non I/O

instruction cycles (for example NOP NOP NOP) between

the IN or OUT command and the SLEEP command.

The total power consumption is directly proportional to

the active time of the

µC. For a rough estimation of the

expected average system current consumption, the fol-

lowing formula should be used:

Itotal (VDD,fsyscl) = ISleep + (IDD

tactive / ttotal)

IDD depends on VDD and fsyscl.

The T48C893 has various power-down modes. During

the sleep mode the clock for the MARC4 core is stopped.

With the NSTOP-bit in the clock management register

(CM) it is programmable if the clock for the on–chip pe-

ripherals is active or stopped during the sleep mode. If the

clock for the core and the peripherals is stopped the se-

lected oscillator is switched off. An exception is the

32-kHz oscillator, if it is selected it runs continously inde-

pendent of the NSTOP-bit. If the oscillator is stopped or

the 32 kHz oscillator is selected, power consumption is

extremely low.

Table 5 Power-down modes

Mode

CPU Core

Osc-Stop*

Brown-out

Function

RC-Oscillator 1

RC-Oscillator 2

4-MHz Oscillator

32-kHz

Oscillator

External Input

Clock

Active

RUN

Active

RUN

YES

Power-down

SLEEP

Active

RUN

YES

SLEEP

YES

STOP

RUN

STOP

* Osc-Stop = SLEEP & NSTOP & WDL

T48C893 Datasheet(PDF) 20 Page - ATMEL Corporation

T48C893 Datasheet(HTML) 20 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

Datasheet Download

Link URL