T48C893 datasheet(64/82 Pages) ATMEL

64 / 82 page

T48C893

Rev. A4, 22-Jan-02

64 (82)

Combination mode 4: Manchester modulation 2

SSI mode 1:

8-bit shift register internal data output (SO) to the Timer 2 modulator stage

Timer 2 mode 3:

8-bit compare counter and 4-bit prescaler

Timer 2 output mode 5:

The modulator 2 of Timer 2 modulates the SSI data output to Manchester code

The 4 bit stage can be used as prescaler for the SSI to generate the stop signal for modulator 2. The SSI has a special

mode to supply the prescaler with the shiftclock. The control output signal (OMSK) of the SSI is used as stop signal

for the modulator. This is an example for a 12-bit Manchester telegram:

000

Counter 2/1 = Compare Register 2/1 (= 4)

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

SCLI

Buffer full

SIR

MSM

Timer 2

Mode 3

SCL

Counter 2/1

OMSK

T2O

13837

Figure 72. Manchester modulation 2

Combination mode 5: Biphase modulation 2

SSI mode 1:

8-bit shift register internal data output (SO) to the Timer 2 modulator stage

Timer 2 mode 3:

8-bit compare counter and 4-bit prescaler

Timer 2 output mode 4:

The modulator 2 of Timer 2 modulates the SSI data output to Biphase code

The 4-bit stage can be used as prescaler for the SSI to generate the stop signal for modulator 2. The SSI has a special

mode to supply the prescaler via the shift-clock. The control output signal (OMSK) of the SSI is used as stop signal

for the modulator. This is an example for a 13-bit Biphase telegram:

000

Counter 2/1 = Compare Register 2/1 (= 5)

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

SCLI

Buffer full

SIR

MSM

Timer 2

Mode 3

SCL

Counter 2/1

OMSK

T2O

13838

Figure 73. Biphase modulation

T48C893 Datasheet(PDF) 64 Page - ATMEL Corporation

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