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DSP56857 Datasheet(PDF) 143 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 143 Page - Freescale Semiconductor, Inc |
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143 / 662 page  Timing Specifications External Memory Interface (EMI), Rev. 4 Freescale Semiconductor 5-17 Figure 5-11. External Read Cycle RWS = RWSH = 1 and RWSS = 0 5.7.2 Write Timing Figure 5-12 shows the write timing for external memory access. For comparison, a single write cycle is shown followed by a null cycle and then a back-to-back write.This figure assumes zero wait states are required for the access. tACCESS tOEV tOHZ tACCESS tOEV tRH tRL tCSV tAV tAV tCSRH Read (RWS = RWSH = 1) Read (RWS = RWSH = 1) IDLE Read (RWS = RWSH = 1) tRSD tRSDP tRSD tRSDP tRSD tRSDP Data In Data In Data In int_sys_clk int_sys_clk_delay A[23:0], PS, DS CS[7:0] RD , OE WR D[15:0] tRC Time added to Figure 5-10 by setting RWSH = 1 |
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