HD64F2145 datasheet(314/829 Pages) RENESAS

314 / 829 page

Rev. 2.0, 08/02, page 274 of 788

TCR

STCR

Channel CKS2

CKS1

CKS0

ICKS1

ICKS0

Description

—

Disables clock input

—

Increments at falling edge of internal clock

ø/8

—

Increments at falling edge of internal clock

ø/2

—

Increments at falling edge of internal clock

ø/64

—

Increments at falling edge of internal clock

ø/128

—

Increments at falling edge of internal clock

ø/1024

—

Increments at falling edge of internal clock

ø/2048

TMR_1

—

Increments at compare-match A from

TCNT_0*

—

Disables clock input

—

Increments at falling edge of internal clock

ø/4

—

Increments at falling edge of internal clock

ø/256

—

Increments at falling edge of internal clock

ø/2048

TMR_Y

—

Disables clock input

—

Disables clock input

—

Increments at falling edge of internal clock

—

Increments at falling edge of internal clock

ø/2

—

Increments at falling edge of internal clock

ø/4

TMR_X

—

Disables clock input

—

Increments at rising edge of external

clock

—

Increments at falling edge of external

clock

Common

—

Increments at both rising and falling

edges of external clock.

Note:* If the TMR_0 clock input is set as the TCNT_1 overflow signal and the TMR_1 clock input is

set as the TCNT_0 compare-match signal simultaneously, a count-up clock cannot be

generated.

HD64F2145 Datasheet(PDF) 314 Page - Renesas Technology Corp

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