TLE9461ES datasheet(23/140 Pages) INFINEON

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TLE9461ES

Lite CAN SBC Family

System Features

Datasheet

Rev.1.1

2019-09-27

5.1.1.2

SBC Init Mode

In SBC Init Mode, the device waits for the microcontroller to finish its startup and initialization sequence.

The SBC starts with a long open watchdog window (see also Chapter 12.2).

All diagnosis functions which are enabled by default at device power-up are active.

While in SBC Init Mode any valid SPI command (from the SPI protocol, i.e. 16-bit word) sets the device to SBC

Normal Mode, i.e. any register can be written, cleared and read. During the long open window the watchdog

has to be triggered (i.e. thereby the watchdog is automatically configured).

A missing watchdog trigger during the long open window will cause a watchdog failure and the device will

enter SBC Restart Mode.

Wake-up events are ignored during SBC Init Mode.

A SBC Soft Reset command (MODE = ‘11’) sets the SBC back into SBC Init Mode and the SPI registers are

changed to their respective Soft Reset values. In case one or both lock bits are set (CFG_LOCK_0 or

CFG_LOCK_1) the locked bits keep their previous values and stay unchanged.

Note:

Any SPI command sets the SBC to SBC Normal Mode even if it is an illegal SPI command (see

Chapter 13.2).

Note:

For a safe start-up, it is recommended to use the first SPI command to trigger and to configure the

watchdog (see Chapter 12.2).

Note:

At power up, the SPI bit VCC1_UV is not set nor is the FO triggered as long as VCC1 is below the VRT,x

threshold and VS is below the VS,UV threshold. The RSTN pin is kept Low as long as VCC1 is below the

selected VRT,x threshold and the reset delay time is not expired. After the first threshold crossing

(VCC1 > Vrt1,r) and the RSTN transition from Low to High, all subsequent undervoltage events lead

to SBC Restart Mode.

Note:

The bit VS_UV is updated only in SBC INIT Mode once RSTN resumes a high level.

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