TLE9461ES datasheet(76/140 Pages) INFINEON

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TLE9461ES

Lite CAN SBC Family

Fail Output (FO) and General Purpose I/O (GPIO)

Datasheet

Rev.1.1

2019-09-27

11.1.2

General Purpose I/O Function as Alternative Function

In case the FO functionality is not used, the pin can be configured with an alternative function as high-voltage

(VS related) General Purpose I/O pin via the SPI bits GPIO.

To avoid unintentional changes of the respective GPIO function during operation the configuration can be

locked via the SPI bit CFG_LOCK_0

FO/GPIO can be reconfigured in SBC Normal Mode for the following functions:

• FO functionality (default state) when configured as GPIO =’000’...’010’:

– Overcurrent shutdown and open load detection is disabled

• Off (also disabled in case FO1 is activated) when configured as GPIO =’100’

• Wake Input when configured as GPIO=’101’:

– There is a blanking time tGPIO,WK,blank when FO/GPIO is configured as wake input. Only then the level

detection becomes valid, i.e. the filter time tFWK1 is started.

– The pin can be used as a wake source. A level change is detected at the threshold VGPIOI,th.

The wake capability can be enabled and disabled by setting the GPIO bits. Once configured as wake

input it is automatically wake capable.

– wake-up events are stored and reported in WK_STAT_1; the bit GPIO_WK_WU is cleared when SBC

Fail-Safe Mode is entered.

– Internal pull-up or pull-down structures are implemented and can be configured with the SPI bits

GPIO_WK_PUPD.

– SBC Normal, Stop-, Init and Restart Mode: The input level is shown in the WK_LVL_STAT register

– SBC Normal and Stop Mode: INTN is triggered in case of a qualified edge change.

– SBC Restart Mode: The SPI is blocked and cannot be read;

INTN is not triggered but GPIO_WK_WU is set.

– SBC Sleep Mode: The device is woken in case of a qualified edge change, i.e. VCC1 is enabled.

WK_LVL_STAT is updated during SBC Sleep and Fail-Safe Mode but it can only be read when entering

SBC Normal Mode again.

• Low-Side incl. PWM control when configured as GPIO =’110’:

– The switch is controlled by the PWM generator: 0% DC = Off and 100% DC = On;

any other duty cycle can be configured in PWM_CTRL.

The PWM frequency can be selected in PWM_FREQ_CTRL

– The respective level at the pin is shown in WK_LVL_STAT in SBC Normal, Stop-, Init and Restart Mode

and can serve as a feedback about the respective switch state1)

– On-state overcurrent shutdown is implemented.

In PWM operation the diagnosis is active only during the LS On-time.

The bit GPIO_OC shows an over current shutdown respectively and the switch is disabled.

Depending on the duty cycle the diagnosis might not be activated considering the respective filter

timing.

• High-Side incl. PWM control when configured as GPIO =’111’:

1) The level is determined by the wake comparator and is shown as Low or High, i.e. the feature might not be useful if a duty cycle of

0% < DC < 100% is applied

TLE9461ES Datasheet(PDF) 76 Page - Infineon Technologies AG

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