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TLE9461ES Datasheet(PDF) 85 Page - Infineon Technologies AG

Part # TLE9461ES
Description  Lite CAN SBC Family
PDF  140 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE9461ES Datasheet(HTML) 85 Page - Infineon Technologies AG

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TLE9461ES
Lite CAN SBC Family
Supervision Functions
Datasheet
85
Rev.1.1
2019-09-27
In SBC Development Mode the watchdog is Off and therefore no reset is generated due to a watchdog failure.
Depending on the configuration, the WD_FAIL bits are set after a watchdog trigger failure as follows:
• In case an incorrect WD trigger is received (triggering in the closed watchdog window or when the
watchdog counter expires without a valid trigger) then the WD_FAIL bits are incremented (showing the
number of incorrect WD triggers)
• For config 2: the bits can have the maximum value of ‘01’
• For config 1, 3 and 4: the bits can have the maximum value of ‘10’
The WD_FAIL bits are cleared automatically if following conditions apply:
• After a successful watchdog trigger
• When the watchdog is Off: in SBC Stop Mode after successfully disabling the watchdog, in SBC Sleep Mode,
or in SBC Fail-Safe Mode (except for a watchdog failure)
12.2.1
Time-Out Watchdog
The time-out watchdog is an easier but less secure watchdog than a window watchdog because the watchdog
trigger can be set at any time within the configured watchdog timer period.
A correct watchdog service immediately results in starting a new watchdog timer period. Taking the
tolerances of the internal oscillator into account the safe trigger area is defined in Figure 33.
If the time-out watchdog period elapses, a watchdog reset is created by setting the reset output RSTN Low and
the SBC switches to SBC Restart or SBC Fail-Safe Mode.
Figure 33 Time-out Watchdog Definitions
12.2.2
Window Watchdog
Compared to the time-out watchdog the characteristic of the window watchdog is that the watchdog timer
period is divided into a closed and an open window. The watchdog must be triggered within the open window.
A correct watchdog trigger results in starting the window watchdog period with a closed window followed by
an open window.
open window
t / [tWD_TIMER]
safe trigger area
Wd1_TimeOut_per.vsd
Watchdog Timer Period (WD_TIMER)
uncertainty
Typical timout watchdog trigger period
tWD x 1.80
tWD x 1.20
tWD x 1.50



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