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NTP53X2 Datasheet(PDF) 18 Page - NXP Semiconductors |
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NTP53X2 Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 133 page ![]() NXP Semiconductors NTP53x2 NTAG 5 link - NFC Forum-compliant I2C bridge NTP53x2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 3.3 — 3 July 2020 COMPANY PUBLIC 544533 18 / 133 Block Address Sec. NFC I2C Byte 0 Byte 1 Byte 2 Byte 3 Description 3 39h 1039h PWM_GPIO_CONFIG RFU PWM and GPIO Configuration (see Section 8.1.3.15) 3 3Ah 103Ah PWM0_ON_OFF PWM1 Configuration (see Section 8.1.3.16) 3 3Bh 103Bh PWM1_ON_OFF PWM1 Configuration (see Section 8.1.3.16) 3 3Ch 103Ch WDT_CONFIG SRAM_ COPY_ BYTES Watch Dog Timer Configuration (see Section 8.1.3.17) and SRAM Copy Bytes (see Section 8.1.5) 3 3Dh 103Dh EH_CONF RFU ED_CONF RFU Energy Harvesting (see Section 8.1.3.18) and Event Detection Pin (see Section 8.1.3.19) Configuration 3 3Eh 103Eh I2C_SLAVE_CONFIG I2C_MASTER_CONFIG (NTP5332) I2C Configuration (see Section 8.1.3.20 and Section 8.1.3.21) 3 3Fh 103Fh SEC_CONF SRAM_ CONF_PROT PP_AREA_1 Device Security Configuration (see Section 8.1.3.22) SRAM and Configuration Protection (see Section 8.1.3.23) AREA_1 Protection Pointer (see Section 8.1.3.24) N/A 40h 1040h N/A ... ... N/A 44h 1044h RFU 7 45h 1045 7 ... ... 7 54h 1054 SRAM_DEFAULT Default SRAM content (see Section 8.1.5) 4 55h 1055h AFI RFU Application Family Identifier (see Section 8.2.3.9.1) 4 56h 1056h DSFID RFU DSFID (see Section 8.1.3.26) |
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