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NTP53X2 Datasheet(PDF) 71 Page - NXP Semiconductors

Part # NTP53X2
Description  NTAG 5 link - NFC Forum-compliant I2C bridge
PDF  133 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

NTP53X2 Datasheet(HTML) 71 Page - NXP Semiconductors

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NXP Semiconductors
NTP53x2
NTAG 5 link - NFC Forum-compliant I2C bridge
NTP53x2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 3.3 — 3 July 2020
COMPANY PUBLIC
544533
71 / 133
Table 135. 64 BIT PASSWORD PROTECTION response format when Error_flag is NOT set
Flags
CRC16
8 bits
16 bits
Table 136. 64 BIT PASSWORD PROTECTION response format when Error_flag is NOT set
Flags
Error Code
CRC16
8 bits
8 bits
16 bits
8.2.3.3.6 PROTECT PAGE
Command code = B6h
The PROTECT PAGE command defines the protection pointer address of the user
memory to divide the user memory into two arbitrarily sized pages and defines the
access conditions for the two pages.
The protection pointer address defines the base address of the higher user memory
segment Page 0-H. All block addresses smaller than the protection pointer address are in
the user memory segment Page 0-L.
Table below shows an example of the user memory segmentation with the protection
pointer address NFC_PP_AREA_0H 14h.
Remark: In the example below PP_AREA_1 is pointing outside the user memory.
Table 137. Memory organization
Block Byte 0
Byte 1
Byte 2
Byte 3
Description
00h
01h
02h
:
:
:
:
:
12h
13h
Page 0-L
14h
15h
:
:
:
:
:
Page 0-H
1FFh
C0
C1
00
Protection
Counter
Remark: If the protection pointer address is set to block 0, the entire user memory is
defined as Page 0-H.
The access conditions and the protection pointer address can be changed under the
following circumstances for plain password mode:
• The related passwords (Read and Write password) have been transmitted first with the
SET PASSWORD command.
• The page protection condition is not locked (see Section 8.2.3.3.7)
The access conditions and the protection pointer address can be changed under the
following circumstances for AES mode:



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