TMS320F28375DPZP datasheet(196/226 Pages) TI

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9.10 Boot ROM and Peripheral Booting

The device boot ROM (on both the CPUs) contains bootloading software. The CPU1 boot ROM does the system

initialization before bringing CPU2 out of reset. The device boot ROM is executed each time the device comes

out of reset. Users can configure the device to boot to flash (using GET mode) or choose to boot the device

through one of the bootable peripherals by configuring the boot mode GPIO pins.

The CPU1 boot ROM, being master, owns the boot mode GPIO and boot configurations. The CPU2 boot ROM

either boots to flash (if configured to do so through user configurable DCSM OTP) or enters a WAIT BOOT mode

if no OTP is programmed. In WAIT BOOT mode, the CPU1 application instructs the CPU2 boot ROM on how to

boot further using boot mode IPC commands supported by CPU2 boot ROM.

Table 9-14 shows the possible boot modes supported on the device. The default boot mode pins are GPIO72

(boot mode pin 1) and GPIO 84 (boot mode pin 0). Users may choose to have weak pullups for boot mode pins if

they use a peripheral on these pins as well, so the pullups can be overdriven. On this device, customers can

change the factory default boot mode pins by programming user configurable DCSM OTP locations. This is

recommended only for cases in which the factory default boot mode pins do not fit into the customer design.

More details on the locations to be programmed is available in the TMS320F2837xD Dual-Core Microcontrollers

Technical Reference Manual .

Table 9-14. Device Boot Mode

MODE NO.

CPU1 BOOT MODE

CPU2 BOOT MODE

TRST

GPIO72

(BOOT

MODE

PIN 1)

GPIO84

(BOOT

MODE

PIN 0)

Parallel I/O

Boot from Master

SCI Mode

Boot from Master

Wait Boot Mode

Boot from master

Get Mode

Boot from Master

4-7

EMU Boot Mode (JTAG debug probe

connected)

Boot from Master

Note

The default behavior of Get mode is boot-to-flash. On unprogrammed devices, using Get mode will

result in repeated watchdog resets, which may prevent proper JTAG connection and device

initialization. Use Wait mode or another boot mode for unprogrammed devices.

CAUTION

Some reset sources are internally driven by the device. The user must ensure the pins used for boot

mode are not actively driven by other devices in the system for these cases. The boot configuration

has a provision for changing the boot pins in OTP. For more details, see the TMS320F2837xD Dual-

Core Microcontrollers Technical Reference Manual .

TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D

TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021

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TMS320F28375DPZP Datasheet(PDF) 196 Page - Texas Instruments

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