TMS320F28375DPZP datasheet(201/226 Pages) TI

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9.14 Watchdog

The watchdog module is the same as the one on previous TMS320C2000™ MCUs, but with an optional lower

limit on the time between software resets of the counter. This windowed countdown is disabled by default, so the

watchdog is fully backwards-compatible.

The watchdog generates either a reset or an interrupt. It is clocked from the internal oscillator with a selectable

frequency divider.

Figure 9-5 shows the various functional blocks within the watchdog module.

/512

WDCLK

(INTOSC1)

Watchdog

Prescaler

WDCR(WDPS(2:0))

WDCR(WDDIS)

SCSR(WDENINT)

1-count

delay

Overflow

SYSRSn

Clear

8-bit

Watchdog

Counter

WDCNTR(7:0)

WDKEY(7:0)

Watchdog

Key Detector

55 + AA

WDWCR(MIN(7:0))

Watchdog

Window

Detector

Count

Good Key

Bad Key

Out of Window

Generate

512-WDCLK

Output Pulse

Watchdog Time-out

WDRSTn

WDINTn

Figure 9-5. Windowed Watchdog

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TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D

TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021

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TMS320F28375DPZP Datasheet(PDF) 201 Page - Texas Instruments

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