MCIMX503CVM8B datasheet(134/136 Pages) NXP

134 / 136 page

i.MX50 Applications Processors for Consumer Products, Rev. 7

Revision History

Freescale Semiconductor

134

6Revision History

Table 86 provides a revision history for this data sheet.

Table 86. i.MX50 Data Sheet Document Revision History

Rev.

Number

Date

Substantive Change(s)

Rev. 7

10/2013

• Added new part number information for parts with 1 GHz core frequencies:

— MCIMX508CVK1B

— MCIMX508CVM1B

— MCIMX507CVM1B

— MCIMX507CVK1B

Updated sections:

— Section 1, “Introduction”

— Table 1, “Ordering Information”

— Table 11, “i.MX50 Operating Ranges”

— Table 15, “Maximum Supply Current Consumption—ARM CLK = 1 GHz” (added)

Rev. 6

07/2013

• In Table 11, “i.MX50 Operating Ranges,” added VCC Stop mode ranges.

Rev. 5

05/2013

• In Table 11, “i.MX50 Operating Ranges,” changed VCC peripheral supply (LPM) minimum voltage from

0.9 V to 1 V, and changed nominal voltage from 0.95 V to 1.05 V.

Rev. 4

01/2013

• In Table 1, "Ordering Information," on page 7, added new part number information for MCIMX507CVK8B.

•In Figure 27, "DTACK Read Access," on page 67, updated timing of EIM_DTACK.

Rev. 3

10/2012

• In Table 11, "i.MX50 Operating Ranges," on page 24:

—Changed DDR clock rate for reduced performance mode (RPM) of VCC from 100 MHz to 133 MHz

—Changed DDR clock rate for high performance mode (HPM) of VCC from 200 MHz to 266 MHz

Rev. 2

05/2012

• In Table 1, "Ordering Information," on page 7, added the following new part numbers: MCIMX508CZK8B,

MCIMX503CVK8B, MCIMX503EVM8B, MCIMX502CVK8B, and MCIMX502EVM8B.

•In Table 1, "Ordering Information," on page 7, added a new column, Tjunction.

•In Table 3, "Package Feature Comparison," on page 9, added a new row for 416 PoPBGA package.

• Updated Figure 1, "i.MX50 System Block Diagram," on page 10 by removing “LDOx3” and “DC-DC 1.2V.”

•In Table 5, "Special Signal Considerations," on page 17, updated details for the following signals:

DRAM_OPEN/DRAM_OPENFB and DRAM_SDODT0/DRAM_SDODT1

•In Table 5, "Special Signal Considerations," on page 17, added new rows for the following signals:

POP_EMMC_RST, POP_LPDDR2_ZQ0/ZQ1, POP_LPDDR2_1.8V, and POP_NAND_VCC.

• Added Section 4.1.2.1, “13 x 13 mm MAPBGA Package Thermal Resistance Data.”

• Added Section 4.1.2.2, “13 x 13 mm PoPBGA Package Thermal Resistance Data.”

• Added Section 4.1.2.3, “17 x 17 mm MAPBGA Package Thermal Resistance Data.”

•In Table 11, "i.MX50 Operating Ranges," on page 24, added footnotes for USB_OTG_VDDA25 and

USB_OTG_VDDA33.

•In Table 78, "VBUS Comparators Thresholds," on page 101, changed VBUS input max current to 350

μA.

• Added Section 5.2, “13 x 13 mm, 0.5 mm Pitch, 416 Pin PoPBGA Package Information.”

•In Table 85, "Alphabetical List of Signal Assignments," on page 124:

—Added a new column “416 PoPBGA Ball Number”

—Changed “USB_H1_VDDA” to “USB_H1_VDDA25, USB_H1_VDDA33”

—Changed “USB_OTG_VDDA” to “USB_OTG_VDDA25, USB_OTG_VDDA33”

• Replace mDDR with LPDDR1 throughout the document.

MCIMX503CVM8B Datasheet(PDF) 134 Page - NXP Semiconductors

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